This part of BS 5070 gives recommendations for the practice to be followed in preparing logic diagrams and the application of binary logic symbols for such diagrams. It should be read in conjunction with Part 1 and Part 2. Analogue and hybrid techniques have not been considered.
This part is applicable to those forms of integrated circuit design in which the basic logic circuit elements are predefined cells which are laid out and interconnected in a manner similar to packages on a printed circuit board. These integrated circuits are known as uncommitted logic arrays, gate arrays, or standard cell arrays.
NOTE 1 The logic circuit diagrams will not contain internal pin numbers, but in all other respects should have the characteristics of the diagrams shown as examples in this standard.
NOTE 2 The symbols and descriptions have been prepared with a view to electrical applications but they are equally applicable to other, non-electrical systems such as pneumatic, hydraulic or mechanical.
NOTE 3 The titles of the publications referred to in this standard are listed on the inside back cover.