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  • IEC 61691-1-1:2011

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    Superseded A superseded Standard is one, which is fully replaced by another Standard, which is a new edition of the same Standard.
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    Behavioural languages - Part 1-1: VHDL Language Reference Manual

    Available format(s):  Hardcopy, PDF, PDF 3 Users, PDF 5 Users, PDF 9 Users

    Superseded date:  11-10-2023

    Language(s):  English

    Published date:  19-05-2011

    Publisher:  International Electrotechnical Committee

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    Table of Contents - (Show below) - (Hide below)

    1. Overview of this standard
    2. Normative references
    3. Design entities and configurations
    4. Subprograms and packages
    5. Types
    6. Declarations
    7. Specifications
    8. Names
    9. Expressions
    10. Sequential statements
    11. Concurrent statements
    12. Scope and visibility
    13. Design units and their analysis
    14. Elaboration and execution
    15. Lexical elements
    16. Predefined language environment
    17. VHDL Procedural Interface overview
    18. VHPI access functions
    19. VHPI information model
    20. VHPI tool execution
    21. VHPI callbacks
    22. VHPI value access and update
    23. VHPI function reference
    24. Standard tool directives
    Annex A (informative) - Description of accompanying files
    Annex B (normative) - VHPI header file
    Annex C (informative) - Syntax summary
    Annex D (informative) - Potentially nonportable constructs
    Annex E (informative) - Changes from IEEE Std 1076-2002
    Annex F (informative) - Features under consideration for
            removal
    Annex G (informative) - Guide to use of standard packages
    Annex H (informative) - Guide to use of protect directives
    Annex I (informative) - Glossary
    Annex J (informative) - Bibliography
    Annex K (informative) - IEEE List of participants
    Index

    Abstract - (Show below) - (Hide below)

    IEC 61691-1-1:2011(E) Revises and enhances the VHDL language reference manual (LRM) by including a standard C language interface specification. The VHDL language was defined for use in the design and documentation of electronics systems. It is revised to incorporate capabilities that improve the language's usefulness for its intended purpose as well as extend it to address design verification methodologies that have developed in industry. These new design and verification capabilities are required to ensure VHDL remains relevant and valuable for use in electronic systems design and verification. Incorporation of previously separate, but related standards, simplifies the maintenance of the specifications. This publication has the status of a double logo IEEE/IEC standard.

    General Product Information - (Show below) - (Hide below)

    Committee TC 91
    Development Note Supersedes IEC 61691-1. (10/2004) Also numbered as IEEE 1076. (05/2011) Stability Date: 2018. (09/2017)
    Document Type Standard
    Publisher International Electrotechnical Committee
    Status Superseded
    Superseded By
    Supersedes

    Standards Referenced By This Book - (Show below) - (Hide below)

    BS EN 62258-5:2006 Semiconductor die products Requirements for information concerning electrical simulation
    IEEE 1685-2014 IEEE Standard for IP-XACT, Standard Structure for Packaging, Integrating, and Reusing IP within Tool Flows
    EN 62258-5 : 2006 SEMICONDUCTOR DIE PRODUCTS - PART 5: REQUIREMENTS FOR INFORMATION CONCERNING ELECTRICAL SIMULATION
    IEEE 1801-2013 REDLINE IEEE Standard for Design and Verification of Low-Power Integrated Circuits
    I.S. EN 62258-5:2006 SEMICONDUCTOR DIE PRODUCTS - PART 5: REQUIREMENTS FOR INFORMATION CONCERNING ELECTRICAL SIMULATION
    I.S. EN 16602-60-02:2014 SPACE PRODUCT ASSURANCE - ASIC AND FPGA DEVELOPMENT
    CEI EN 62258-5 : 2007 SEMICONDUCTOR DIE PRODUCTS - PART 5: REQUIREMENTS FOR INFORMATION CONCERNING ELECTRICAL SIMULATION
    IEEE 1647-2011 REDLINE IEEE Standard for the Functional Verification Language e
    BS IEC 62050:2005 VHDL register transfer level (RTL) synthesis
    IEC 61691-6:2009 Behavioural languages - Part 6: VHDL Analog and Mixed-Signal Extensions
    IEC 61523-4:2015 Design and Verification of Low-Power Integrated Circuits
    IEC 62050:2005 VHDL Register Transfer Level (RTL) synthesis
    IEC 62014-4:2015 IP-XACT, Standard Structure for Packaging, Integrating, and Reusing IP within Tool Flows
    BS EN 16602-60-02:2014 Space product assurance. ASIC and FPGA development
    IEC 62265:2005 Advanced Library Format (ALF) describing Integrated Circuit (IC) technology, cells and blocks
    IEC TR 63051:2017 Documentation on design automation subjects - Mathematical algorithm hardware description languages for system level modeling and verification (HDLMath)
    IEC 62258-5:2006 Semiconductor die products - Part 5: Requirements for information concerning electrical simulation
    EN 16602-60-02:2014 Space product assurance - ASIC and FPGA development
    BS IEC 61523-4:2015 Design and Verification of Low-Power Integrated Circuits
    BS IEC 62265:2005 Advanced library format (ALF) describing integrated circuit (IC) technology, cells and blocks
    PD IEC/TR 63051:2017 Documentation on design automation subjects. Mathematical algorithm hardware description languages for system level modeling and verification (HDLMath)
    IEEE 1735-2014 IEEE Recommended Practice for Encryption and Management of Electronic Design Intellectual Property (IP)
    IEC 62014-5:2015 Quality of Electronic and Software Intellectual Property Used in System and System on Chip (SoC) Designs

    Standards Referencing This Book - (Show below) - (Hide below)

    IEEE 1164-1993 IEEE Standard Multivalue Logic System for VHDL Model Interoperability (Std_logic_1164)
    ISO/IEC 8859-1:1998 Information technology 8-bit single-byte coded graphic character sets Part 1: Latin alphabet No. 1
    IEEE 1076.6-2004 IEEE Standard for VHDL Register Transfer Level (RTL) Synthesis
    IEEE 1076.3-1997 IEEE Standard VHDL Synthesis Packages
    ANSI X9.52 : 1998 TRIPLE DATA ENCRYPTION ALGORITHM MODES OF OPERATION
    FIPS PUB 81 : 0 DES MODES OF OPERATION
    FIPS PUB 197 : 2001 ADVANCED ENCRYPTION STANDARD (AES)
    ISO/IEC 19501:2005 Information technology — Open Distributed Processing — Unified Modeling Language (UML) Version 1.4.2
    FIPS PUB 46 : 0002 DATA ENCRYPTION STANDARD (DES)
    IEEE 854-1987 IEEE Standard for Radix-Independent Floating-Point Arithmetic
    IEEE 1076.1-2007 IEEE Standard VHDL Analog and Mixed-Signal Extensions
    ISO/IEC 9899:2011 Information technology Programming languages C
    ISO/IEC 10118-3:2004 Information technology Security techniques Hash-functions Part 3: Dedicated hash-functions
    IEEE 1076.4-2000 IEEE Standard VITAL ASIC (Application Specific Integrated Circuit) Modeling Specification
    IEEE 1076.2-1996 IEEE Standard VHDL Mathematical Packages
    IEEE 754-2008 REDLINE IEEE Standard for Floating-Point Arithmetic
    IEC 62531:2012 Property Specification Language (PSL)
    IEEE 1149.1-2013 REDLINE IEEE Standard for Test Access Port and Boundary-Scan Architecture
    FIPS PUB 180 : 2002 SECURE HASH STANDARD
    IEEE/Open Group 1003.1, 2013 Edition IEEE Standard for Information Technology—Portable Operating System Interface (POSIX(TM)) Base Specifications, Issue 7
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