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  • EN 60191-6:2009

    Current The latest, up-to-date edition.

    Mechanical standardization of semiconductor devices - Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages

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    Published date:  23-12-2009

    Publisher:  European Committee for Standards - Electrical

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    Table of Contents - (Show below) - (Hide below)

    FOREWORD
    1 Scope
    2 Normative references
    3 Terms and definitions
    4 Design rules
    5 Dimensions to be specified
    6 Notes
    Annex A (informative) - Illustration of the rules
    Annex B (informative) - Optional table format
    Bibliography
    Annex ZA (normative) - Normative references to
             international publications with their
             corresponding European publications

    Abstract - (Show below) - (Hide below)

    IEC 60191-6:2009 gives general rules for the preparation of outline drawings of surface-mounted semiconductor devices. It supplements IEC 60191-1 and IEC 60191-3. It covers all surface-mounted devices discrete semiconductors with lead count of greater or equal to 8, as well as integrated circuits classified as form E in Clause 3 of IEC 60191-4. This third edition of IEC 60191-6 cancels and replaces the second edition, published in 2004 and constitutes a technical revision. This edition includes the following significant changes with respect to the previous edition: a) scope is modified to cover all surface-mounted devices discrete semiconductors with lead count of greater or equal to 8; b) editorial modifications on several pages; and c) technical revision to ball grid array package (BGA) especially its geometrical drawing format. (two types of BGA would unify as one type as a result of revising drawing format.

    General Product Information - (Show below) - (Hide below)

    Committee CLC/SR 47D
    Document Type Standard
    Publisher European Committee for Standards - Electrical
    Status Current

    Standards Referenced By This Book - (Show below) - (Hide below)

    CEI EN 60191-6-17 : 2012 MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES - PART 6-17: GENERAL RULES FOR THE PREPARATION OF OUTLINE DRAWINGS OF SURFACE MOUNTED SEMICONDUCTOR DEVICE PACKAGES - DESIGN GUIDE FOR STACKED PACKAGES - FINE-PITCH BALL GRID ARRAY AND FINE-PITCH LAND GRID ARRAY (P-PFBGA AND P-PFLGA)
    CEI EN 60191-6-13 : 2009 MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES - PART 6-13: DESIGN GUIDELINE OF OPEN-TOP-TYPE SOCKETS FOR FINEPITCH BALL GRID ARRAY (FBGA) AND FINE-PITCH LAND GRID ARRAY (FLGA)
    BS EN 61240:2012 Piezoelectric devices. Preparation of outline drawings of surface-mounted devices (SMD) for frequency control and selection. General rules
    CEI EN 61760-1 : 2007 SURFACE MOUNTING TECHNOLOGY - PART 1: STANDARD METHOD FOR THE SPECIFICATION OF SURFACE MOUNTING COMPONENTS (SMDS)
    BS EN 60191-6-18:2010 Mechanical standardization of semiconductor devices General rules for the preparation of outline drawings of surface mounted semiconductor device packages. Design guide for ball grid array (BGA)
    I.S. EN 60191-6-17:2011 MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES - PART 6-17: GENERAL RULES FOR THE PREPARATION OF OUTLINE DRAWINGS OF SURFACE MOUNTED SEMICONDUCTOR DEVICE PACKAGES - DESIGN GUIDE FOR STACKED PACKAGES - FINE-PITCH BALL GRID ARRAY AND FINE-PITCH LAND GRID ARRAY (P-PFBGA AND P-PFLGA)
    EN 61837-2:2011/A1:2014 SURFACE MOUNTED PIEZOELECTRIC DEVICES FOR FREQUENCY CONTROL AND SELECTION - STANDARD OUTLINES AND TERMINAL LEAD CONNECTIONS - PART 2: CERAMIC ENCLOSURES (IEC 61837-2:2011/A1:2014)
    EN 60191-6-20:2010 Mechanical standardization of semiconductor devices - Part 6-20: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Measuring methods for package dimensions of small outline J-lead packages (SOJ)
    EN 60191-6-13:2016 Mechanical standardization of semiconductor devices - Part 6-13: Design guideline of open-top-type sockets for Fine-pitch Ball Grid Array (FBGA) and Fine-pitch Land Grid Array (FLGA)
    EN 60191-6-18:2010 Mechanical standardization of semiconductor devices - Part 6-18: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for ball grid array (BGA)
    EN 61837-3:2015 Surface mounted piezoelectric devices for frequency control and selection - Standard outlines and terminal lead connections - Part 3: Metal enclosures
    EN 60191-6-17:2011 Mechanical standardization of semiconductor devices - Part 6-17: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for stacked packages - Fine-pitch ball grid array and fine-pitch land grid array (P-PFBGA and P-PFLGA)
    EN 61240:2017 Piezoelectric devices - Preparation of outline drawings of surface-mounted devices (SMD) for frequency control and selection - General rules
    BS EN 60191-6-21:2010 Mechanical standardization of semiconductor devices General rules for the preparation of outline drawings of surface mounted semiconductor device packages. Measuring methods for package dimensions of small outline packages (SOP)
    BS EN 60191-6-12:2011 Mechanical standardization of semiconductor devices General rules for the preparation of outline drawings of surface mounted semiconductor device packages. Design guidelines for fine-pitch land grid array (FLGA)
    I.S. EN 61760-1:2006 SURFACE MOUNTING TECHNOLOGY - PART 1: STANDARD METHOD FOR THE SPECIFICATION OF SURFACE MOUNTING COMPONENTS (SMDS)
    OVE/ONORM EN 61760-1 : 2006 SURFACE MOUNTING TECHNOLOGY - PART 1: STANDARD METHOD FOR THE SPECIFICATION OF SURFACE MOUNTING COMPONENTS (SMDS)
    I.S. EN 60191-6-20:2010 MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES - PART 6-20: GENERAL RULES FOR THE PREPARATION OF OUTLINE DRAWINGS OF SURFACE MOUNTED SEMICONDUCTOR DEVICE PACKAGES - MEASURING METHODS FOR PACKAGE DIMENSIONS OF SMALL OUTLINE J-LEAD PACKAGES (SOJ)
    CEI EN 60191-6-18 : 2011 MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES - PART 6-18: GENERAL RULES FOR THE PREPARATION OF OUTLINE DRAWINGS OF SURFACE MOUNTED SEMICONDUCTOR DEVICE PACKAGES - DESIGN GUIDE FOR BALL GRID ARRAY (BGA)
    CEI EN 60191-6-21 : 2011 MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES - PART 6-21: GENERAL RULES FOR THE PREPARATION OF OUTLINE DRAWINGS OF SURFACE MOUNTED SEMICONDUCTOR DEVICE PACKAGES - MEASURING METHODS FOR PACKAGE DIMENSIONS OF SMALL OUTLINE PACKAGES (SOP)
    BS EN 61760-1:2006 Surface mounting technology Standard method for the specification of surface mounting components (SMDs)
    I.S. EN 60191-6-13:2016 MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES - PART 6-13: DESIGN GUIDELINE OF OPEN-TOP-TYPE SOCKETS FOR FINE-PITCH BALL GRID ARRAY (FBGA) AND FINE-PITCH LAND GRID ARRAY (FLGA)
    I.S. EN 60191-6-18:2010 MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES - PART 6-18: GENERAL RULES FOR THE PREPARATION OF OUTLINE DRAWINGS OF SURFACE MOUNTED SEMICONDUCTOR DEVICE PACKAGES - DESIGN GUIDE FOR BALL GRID ARRAY (BGA)
    CEI EN 61240 : 2013 PIEZOELECTRIC DEVICES - PREPARATION OF OUTLINE DRAWINGS OF SURFACE-MOUNTED DEVICES (SMD) FOR FREQUENCY CONTROL AND SELECTION - GENERAL RULES
    EN 61760-1:2006 SURFACE MOUNTING TECHNOLOGY - PART 1: STANDARD METHOD FOR THE SPECIFICATION OF SURFACE MOUNTING COMPONENTS (SMDS)
    CEI EN 60191-6-20 : 2011 MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES - PART 6-20: GENERAL RULES FOR THE PREPARATION OF OUTLINE DRAWINGS OF SURFACE MOUNTED SEMICONDUCTOR DEVICE PACKAGES - MEASURING METHODS FOR PACKAGE DIMENSIONS OF SMALL OUTLINE J-LEAD PACKAGES (SOJ)
    BS EN 60191-6-17:2011 Mechanical standardization of semiconductor devices General rules for the preparation of outline drawings of surface mounted semiconductor device packages. Design guide for stacked packages. Fine-pitch ball grid array and fine-pitch land grid array (P-PFBGA and P-PFLGA)
    BS EN 60191-6-20:2010 Mechanical standardization of semiconductor devices General rules for the preparation of outline drawings of surface mounted semiconductor device packages. Measuring methods for package dimensions of small outline J-lead packages (SOJ)
    I.S. EN 60191-6-21:2010 MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES - PART 6-21: GENERAL RULES FOR THE PREPARATION OF OUTLINE DRAWINGS OF SURFACE MOUNTED SEMICONDUCTOR DEVICE PACKAGES - MEASURING METHODS FOR PACKAGE DIMENSIONS OF SMALL OUTLINE PACKAGES (SOP)
    I.S. EN 61240:2017 PIEZOELECTRIC DEVICES - PREPARATION OF OUTLINE DRAWINGS OF SURFACE-MOUNTED DEVICES (SMD) FOR FREQUENCY CONTROL AND SELECTION - GENERAL RULES
    BS EN 61837-3:2015 Surface mounted piezoelectric devices for frequency control and selection. Standard outlines and terminal lead connections Metal enclosures
    BS EN 60191-6-13:2016 Mechanical standardization of semiconductor devices Design guideline of open-top-type sockets for Fine-pitch Ball Grid Array (FBGA) and Fine-pitch Land Grid Array (FLGA)
    BS EN 61837-2 : 2011 SURFACE MOUNTED PIEZOELECTRIC DEVICES FOR FREQUENCY CONTROL AND SELECTION - STANDARD OUTLINES AND TERMINAL LEAD CONNECTIONS - PART 2: CERAMIC ENCLOSURES
    I.S. EN 60191-6-12:2011 MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES - PART 6-12: GENERAL RULES FOR THE PREPARATION OF OUTLINE DRAWINGS OF SURFACE MOUNTED SEMICONDUCTOR DEVICE PACKAGES - DESIGN GUIDELINES FOR FINE-PITCH LAND GRID ARRAY (FLGA)
    EN 60191-6-21 : 2010 MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES - PART 6-21: GENERAL RULES FOR THE PREPARATION OF OUTLINE DRAWINGS OF SURFACE MOUNTED SEMICONDUCTOR DEVICE PACKAGES - MEASURING METHODS FOR PACKAGE DIMENSIONS OF SMALL OUTLINE PACKAGES (SOP)
    EN 60191-6-12:2011 Mechanical standardization of semiconductor devices - Part 6-12: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guidelines for fine-pitch land grid array (FLGA)

    Standards Referencing This Book - (Show below) - (Hide below)

    IEC 60191-1:2007 Mechanical standardization of semiconductor devices - Part 1: General rules for the preparation of outline drawings of discrete devices
    ISO 2692:2014 Geometrical product specifications (GPS) Geometrical tolerancing Maximum material requirement (MMR), least material requirement (LMR) and reciprocity requirement (RPR)
    EN ISO 1101:2017 Geometrical product specifications (GPS) - Geometrical tolerancing - Tolerances of form, orientation, location and run-out (ISO 1101:2017)
    ISO 1101:2017 Geometrical product specifications (GPS) — Geometrical tolerancing — Tolerances of form, orientation, location and run-out
    IEC 60191-2:2012 DB Mechanical standardization of semiconductor devices - Part 2: Dimensions
    EN 60191-3:1999 Mechanical standardization of semiconductor devices - Part 3: General rules for the preparation of outline drawings of integrated circuits
    IEC 60191-4:2013 Mechanical standardization of semiconductor devices - Part 4: Coding system and classification into forms of package outlines for semiconductor device packages
    EN ISO 2692:2014 Geometrical product specifications (GPS) - Geometrical tolerancing - Maximum material requirement (MMR), least material requirement (LMR) and reciprocity requirement (RPR) (ISO 2692:2014)
    IEC 60191-3:1999 Mechanical standardization of semiconductor devices - Part 3: General rules for the preparation of outline drawings of integrated circuits
    EN 60191-1:2007 Mechanical standardization of semiconductor devices - Part 1: General rules for the preparation of outline drawings of discrete devices
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