GEIA SSB 1.004 : 2009

Acknowledgments
1 Scope
2 Reference Documents
3 Use Condition Based Reliability Evaluation
4 Failure Rate Estimating Methodology
  4.1 Thermal Effects (HTOL Test Extrapolation)
      4.1.1 Voltage Acceleration for Microcircuits
      4.1.2 Voltage Derating for Discrete Semiconductor
            Devices
  4.2 Temperature-Humidity-Bias Effects (HAST Test
      Extrapolation)
  4.3 Thermo-mechanical Effects (Thermal Cycling Test
      Extrapolation)
  4.4 Thermal Effects for Nonvolatile Memory (NVM) Data
      Retention
      4.4.1 Data Retention Extrapolation Using the
            Arrhenius Life-Temperature Relationship
      4.4.2 Data Retention Extrapolation Using the T-Model
  4.5 Overall Failure Rate Summary
  4.6 Sub-System Level Analysis
5 Deriving Acceleration Test Parameters from Use Condition
  Parameters and Sub-System Failure Rate Requirements
  5.1 Temperature-Humidity-Bias Effects (HAST Test
      Extrapolation)
  5.2 Thermo-mechanical Effects (Thermal Cycling Test
      Extrapolation)

Provides reference information concerning methods commonly used by the semiconductor industry to estimate failure rates from accelerated test results.