1 SCOPE
1.1 Purpose
1.2 Performance Classification, Wiring Type, and
Installation Usage
1.2.1 Classification
1.2.2 Wiring Type
1.2.3 Installation Uses
1.2.4 Selection for Procurement
2 APPLICABLE DOCUMENTS
2.1 IPC
2.2 Joint Industry Standards
2.3 Federal
2.4 American Society for Testing and Materials
2.5 National Electrical Manufacturers Association
3 REQUIREMENTS
3.1 Terms and Definitions
3.1.1 Coverlayer
3.1.2 Coverfilm
3.1.3 Covercoat
3.2 Material
3.2.1 Flexible Material Options
3.2.2 Laminates and Bonding Material for Multilayer
Flexible Printed Wiring
3.2.3 External Bonding Materials
3.2.4 Other Dielectric Materials
3.2.5 Metal Foils
3.2.6 Metallic Platings and Coatings
3.2.7 Organic Solderability Preservative (OSP)
3.2.8 Coverlayer
3.2.9 Solder Resist
3.2.10 Fusing Fluids and Fluxes
3.2.11 Marking Inks
3.2.12 Hole Fill Insulation Material
3.2.13 Heatsink Planes, External
3.3 Visual Examination
3.3.1 Profile
3.3.2 Construction Imperfections
3.3.3 Plating and Coating Voids in the Hole
3.3.4 Marking
3.3.5 Solderability
3.3.6 Plating Adhesion
3.3.7 Edge Board Contact, Junction of Gold Plate
to Solder Finish
3.3.8 Lifted Lands
3.3.9 Workmanship
3.4 Dimensional Requirements
3.4.1 Hole Size and Hole Pattern Accuracy
3.4.2 Annular Ring and Breakout (Internal)
3.4.3 Annular Ring (External)
3.4.4 Bow and Twist (Individual Rigid or Stiffener
Portions Only)
3.5 Conductor Definition
3.5.1 Conductor Imperfections
3.5.2 Conductor Spacing
3.5.3 Conductive Surfaces
3.6 Physical Requirements
3.6.1 Bending Flexibility
3.6.2 Flexible Endurance
3.6.3 Bond Strength (Unsupported Lands)
3.6.4 Bond Strength (Stiffener)
3.7 Structural Integrity
3.7.1 Thermal Stress Testing
3.7.2 Requirements for Microsectioned Coupons
3.7.3 Laminate Integrity (Flexible)
3.7.4 Laminate Integrity (Rigid)
3.7.5 Etchback (Type 3 and Type 4 Only)
3.7.6 Smear Removal (Type 3 and Type 4 Only)
3.7.7 Negative Etchback
3.7.8 Plating Integrity
3.7.9 Plating Voids
3.7.10 Annular Ring (Internal)
3.7.11 Plating/Coating Thickness
3.7.12 Minimum Layer Copper Foil Thickness
3.7.13 Minimum Surface Conductor Thickness
3.7.14 Metal Cores
3.7.15 Dielectric Thickness
3.7.16 Resin Fill of Blind and Buried Vias
3.8 Rework Simulation
3.9 Electrical Requirements
3.9.1 Dielectric Withstanding Voltage
3.9.2 Circuitry
3.9.3 Circuit/Plated-Through Hole Shorts to
Metal Substrates
3.9.4 Insulation Resistance (As Received)
3.10 Environmental Requirements
3.10.1 Moisture and Insulation Resistance
3.10.2 Thermal Shock
3.10.3 Cleanliness
3.10.4 Organic Contamination
3.10.5 Fungus Resistance
3.11 Special Requirements
3.11.1 Outgassing
3.11.2 Impedance Testing
3.11.3 Repair
3.11.4 Circuit Repair
3.11.5 Rework
3.11.6 Coefficient of Thermal Expansion (CTE)
4 QUALITY ASSURANCE PROVISIONS
4.1 Qualification
4.1.1 Sample Test Specimen
4.2 Quality Conformance Inspection
4.2.1 Referee Tests
4.3 Reliability Test and Evaluation
4.3.1 Reliability Test Coupons
5 NOTES
5.1 Ordering Data
5.2 Superseded Specifications
APPENDIX A