• IPC D 356 : B

    Current The latest, up-to-date edition.

    BARE SUBSTRATE ELECTRICAL TEST DATA FORMAT

    Available format(s):  Hardcopy

    Language(s):  English

    Published date:  01-10-2002

    Publisher:  Institute of Printed Circuits

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    Table of Contents - (Show below) - (Hide below)

    1 SCOPE AND OBJECTIVE
       1.1 Format Compatibility
       1.2 Goal of Revision B
       1.3 Changes Between Revision A and B
       1.4 Data Records and Their Organization
       1.5 IPC D-356B file Usage
       1.6 Interpretation
    2 APPLICABLE DOCUMENTS
       2.1 IPC
       2.2 American National Standards Institute
       2.3 International Electrotechnical Commission (IEC)
            International Standards Organization (ISO)
    3 TERMS AND DEFINITIONS
       3.1 Field
       3.2 Record
       3.3 Physical Layer
       3.4 Job Data
       3.5 Feature
       3.6 Datum Reference
       3.7 Modal Form
       3.8 Operation Codes
       3.9 End-Point Optimization
       3.10 Adjacency
    4 GENERAL REQUIREMENTS
       4.1 Data Hierarchy
       4.2 Basic Record Types
       4.3 Compatibility
       4.4 Fixed and Field Delimited Formats
       4.5 Data Set Descriptions
       4.6 Data Sorting
       4.7 Data Orientation
       4.8 Line Termination
       4.9 Transfer Media and Data Formats
    5 ORGANIZATION OF THE IPC-D-356B FILE
       5.1 Organization of the Job Data File
    6 PARAMETER RECORDS AND JOB DATA FILE ORGANIZATION
       6.1 Parameter JOB
       6.2 Parameter CODE
       6.3 Parameter UNITS
       6.4 Parameter TITLE
       6.5 Parameter NUM
       6.6 Parameter REV
       6.7 Parameter VER
       6.8 Parameter IMAGE
       6.9 Parameter REMOVED_CONDUCTORS
       6.10 Parameter NNAME
       6.11 Parameter TEST
       6.12 Parameter SECONDARY_SIDE_LAYER
       6.13 Parameter GRID_UNITS
       6.14 Parameter SOURCE
       6.15 Parameter ADJACENCY
       6.16 Parameter BOARD_ THICKNESS
    7 COMMENT RECORDS AND ALLOWED CHARACTERS
       7.1 Allowable Character Set
       7.2 Comment Records Utilizing 2-Byte
    8 ELECTRICAL TEST RECORDS STRUCTURE
       8.1 Operation Code Definition (Columns 1-3)
       8.2 Signal Name Identifier (Columns 4-20)
       8.3 Component Name Identifier (Columns 21-31)
       8.4 Columns 33-38
       8.5 Feature Side and Layer Designation
            (Columns 39-41)
       8.6 Feature Location Field (Columns 42-57)
       8.7 Feature Shape and Size Definition
            (Columns 58 and beyond)
       8.8 Rotation of Standard Shapes
       8.9 Soldermask Defined Edges
       8.10 Test Area Attributes
       8.11 Complex Records
       8.12 Non-Conductive holes
    9 SPECIFIED TEST POINT LOCATION
       9.1 Operation Code Definition (Columns 1-3)
       9.2 Signal Identification Field (Columns 4-17)
       9.3 Unassigned Fields (Columns 18-21)
       9.4 Assigned Tester Label Field (Columns 22-37)
       9.5 Unassigned Field (Column 38)
       9.6 Tester Side Designation (Columns 39-41)
       9.7 Test Point Location Field (columns 42-57)
       9.8 Z Access Information (Columns 59-66)
       9.9 Unassigned Field (Column 67)
       9.10 Optional Multi-Image Test Indicator
            (Columns 68-72)
       9.11 Unassigned Field (Column 73)
       9.12 Optional Multi-Test Indicator
            (Columns 74-75)
    10 GRAPHICAL SUPPORT OF BOARD IMAGE
       10.1 Trace Segment Data
       10.2 Contour Copper (Polygon) Areas
       10.3 Board and Panel Outlines
    11 ADJACENCY DATA
       11.1 Operation Code Definition (Columns 1-3)
       11.2 Initial Signal Identification Field
       11.3 Adjacent Nets
       11.4 Adjacency Continuation Record
       11.5 Subsequent Listing of Adjacencies
    12 ELECTRICAL TEST MEASUREMENT DATA
       12.1 Controlled Impedance Test Information
       12.2 High Voltage Test Information
       12.3 Embedded and On-Board Passive Components and
            Measurements
    13 SPECIAL AND NON-TEST FEATURES
       13.1 Operation Code Definition (Columns 1-3)
       13.2 Feature Type Name (Columns 4-17)
       13.3 Columns 18-38
       13.4 Columns 39-77
    14 STEPPED IMAGES USING THE IMAGE PARAMETER
       14.1 Defining the Primary Image
       14.2 Defining a Stepped Image
       14.3 Rules of Step and Repeat
       14.4 Order of Operations
    Appendix A Recommended File Content
    Appendix B Completer List of Op-Codes
    Appendix C ISO Code Character Set
    Appendix E Native Language Codes
    Appendix F End-Point Optimization
    Figures and Tables

    Abstract - (Show below) - (Hide below)

    Describes a data format for transmitting bare board electrical test information.

    General Product Information - (Show below) - (Hide below)

    Committee 2-10
    Document Type Standard
    Publisher Institute of Printed Circuits
    Status Current

    Standards Referenced By This Book - (Show below) - (Hide below)

    MIL-STD-1840 Revision C:1997 AUTOMATED INTERCHANGE OF TECHNICAL INFORMATION
    IPC 2221 GERMAN : B GENERIC STANDARD ON PRINTED BOARD DESIGN
    IPC 7092 : 0 DESIGN AND ASSEMBLY PROCESS IMPLEMENTATION FOR EMBEDDED COMPONENTS
    IPC 2141 : A DESIGN GUIDE FOR HIGH-SPEED CONTROLLED IMPEDANCE CIRCUIT BOARDS
    IPC 7095 : C DESIGN AND ASSEMBLY PROCESS IMPLEMENTATION FOR BGAS
    IPC 2221B:2012 GENERIC STANDARD ON PRINTED BOARD DESIGN
    IPC 2221 FRENCH : B2012 GENERIC STANDARD ON PRINTED BOARD DESIGN

    Standards Referencing This Book - (Show below) - (Hide below)

    IPC 9252 : A REQUIREMENTS FOR ELECTRICAL TESTING OF UNPOPULATED PRINTED BOARDS
    IPC D 325 : A DOCUMENTATION REQUIREMENTS FOR PRINTED BOARDS
    IPC S 100 : LATEST STANDARDS AND SPECIFICATIONS MANUAL
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