• SN EN 61964 : 1999

    Current The latest, up-to-date edition.

    INTEGRATED CIRCUITS - MEMORY DEVICES PIN CONFIGURATIONS

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    Published date:  12-01-2013

    Publisher:  Swiss Standards

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    Table of Contents - (Show below) - (Hide below)

    INTRODUCTION
    1. Scope
    2. Normative reference
    3. Terms and definitions
    4. Pin Configurations Catalogue
           4.1 Integrated Circuit Dynamic Read/Write
                 Memories
           4.2 Integrated Circuit Synchronous Dynamic
                 Read/Write Memories
           4.3 Integrated Circuit Static Read/Write Memories
           4.4 Integrated Circuit Read-only Memories
           4.5 Integrated Circuit Programmable Read-Only
                 Memories
           4.6 MOS Ultraviolet Light Erasable and Programmable
                 Read-Only Memories
           4.7 Integrated Circuit Electrically Erasable and
                 Programmable Read-Only Memories
           4.8 Memory Modules Comprising Integrated Circuit
                 Memories
    Annex A (informative) Bibliography
    Table 1 - Nibble wide organization DRAM
    Table 2 - Byte wide organization DRAM
    Table 3 - Word wide organization DRAM (1)
    Table 4 - Word wide organization DRAM (2)
    Table 5 - Nibble wide organization SDRAM
    Table 6 - Byte wide organization SDRAM
    Table 7 - Word wide organization SDRAM
    Annex ZA (normative) Normative references to international
    publications with their corresponding European publications

    Abstract - (Show below) - (Hide below)

    Covers pinout package configurations of solid state integrated circuit memory devices. This standard is intended to establish a registration procedure for such configurations.

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    Document Type Standard
    Publisher Swiss Standards
    Status Current
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