Foreword
Introduction
1 Scope
2 Normative references
2.1 Normative references
2.2 Approved references
2.3 References under development
2.4 Other references
3 Definitions, symbols, abbreviations, and conventions
3.1 Definitions
3.2 Symbols and abbreviations
3.3 Keywords
3.4 Conventions
3.5 Notation for Procedures and Functions
4 General
4.1 General overview
4.2 Cables, Connectors, Signals, Transceivers
4.3 Physical architecture of bus
4.4 Physical topology details and definitions
4.5 Bus loading
4.6 Termination requirements
4.7 SCSI device Addressing
4.8 Data transfers
4.9 Data transfer modes
4.10 Protocol
5 SCSI parallel interface connectors
5.1 SCSI parallel interface connectors overview
5.2 Nonshielded connector
5.3 Shielded connector
5.4 Connector contact assignments
6 SCSI bus interconnect
6.1 SCSI bus interconnect overview
6.2 SCSI bus cables
6.3 Interconnect characteristics for signals
6.4 Decoupling characteristics for TERMPWR lines
6.5 Connection requirements for RESERVED lines
6.6 Cables used with SE transceivers
6.7 SE ground offset
6.8 Cables used with LVD transceivers
6.9 LVD stub length and spacing
7 SCSI parallel interface electrical characteristics
7.1 SCSI parallel interface electrical characteristics overview
7.2 SE alternative
7.3 LVD alternative
7.4 LVD/MSE multimode alternative
7.5 Terminator power
8 SCSI bus signals
8.1 SCSI bus signals overview
8.2 Signal descriptions
8.3 Signal states
8.4 OR-tied signals
8.5 Signal sources
9 SCSI parallel bus timing
9.1 SCSI parallel bus timing values
9.2 Timing description
9.3 Measurement points
9.4 Setup and hold timings
10 SCSI bus phases
10.1 SCSI bus phases overview
10.2 BUS FREE phase
10.3 Unexpected bus free phases
10.4 Expected bus free phases
10.5 Arbitration
10.6 SELECTION phase
10.7 RESELECTION phase
10.8 Information transfer phases
10.9 COMMAND phase
10.10 DATA phase
10.11 STATUS phase
10.12 MESSAGE phase
10.13 Signal restrictions between phases
11 DATA BUS protection
11.1 DATA BUS protection overview
11.2 ST DATA BUS protection (parity)
11.3 DT DATA BUS protection (CRC)
12 SCSI bus conditions
12.1 SCSI bus conditions overview
12.2 Attention condition
12.3 Hard reset
12.4 Reset events
13 SCSI bus phase sequences
13.1 SCSI bus phase sequences overview
13.2 Phase sequences for physical reconnection and selection
using attention condition with information unit transfers
disabled
13.3 Phase sequences for selection without using attention
condition with information unit transfers disabled
13.4 Phase sequences for selection without using attention
condition/physical reconnection with information unit
transfers enabled
13.5 Phase sequences for physical selection using attention
condition with information unit transfers enabled
14 SPI information unit sequences
14.1 SPI information unit overview
14.2 Information unit transfer logical operations
14.3 SPI information units
15 SCSI pointers
16 SCSI messages
16.1 SCSI messages overview
16.2 Message protocols and formats
16.3 Link control messages
16.4 Task attribute messages
16.5 Task management messages
17 Command processing considerations and exception conditions
17.1 Command processing considerations and exception conditions
overview
17.2 Asynchronous event notification
17.3 Incorrect initiator connection
17.4 Unexpected RESELECTION phase
18 SCSI management features for the SCSI parallel interface
18.1 SCSI mode parameters
19 SCSI parallel interface services
19.1 SCSI parallel interface services overview
19.2 Procedure objects
19.3 Application client SCSI command services
19.4 Device server SCSI command services
19.5 Task management services
Annexes
A Additional requirements for LVD SCSI drivers and receivers
B SCSI bus fairness
C Nonshielded connector alternative 4
D Removal and insertion of SCSI devices
E SCSI cable media performance testing
F Interconnecting buses of different widths
G Transmission line considerations for SE fast-20 data transfer
rates
H Measuring SE pin capacitance
I SCSI ICONS
J Backplane construction guidelines
K SPI-3 to SCSI-2 terminology mapping
L Physical layer integrity checking
M Alternate error detection for the asynchronous information
phases (COMMAND, MESSAGE, and STATUS)