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ASTM F 1192 : 2011 : R2018

Superseded

Superseded

A superseded Standard is one, which is fully replaced by another Standard, which is a new edition of the same Standard.

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Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices

Available format(s)

Hardcopy , PDF

Superseded date

11-06-2024

Superseded by

ASTM F 1192 : 2024

Language(s)

English

Published date

01-03-2018

€74.48
Excluding VAT

Committee
E 10
DocumentType
Guide
Pages
11
PublisherName
American Society for Testing and Materials
Status
Superseded
SupersededBy
Supersedes

1.1This guide defines the requirements and procedures for testing integrated circuits and other devices for the effects of single event phenomena (SEP) induced by irradiation with heavy ions having an atomic number Z 2. This description specifically excludes the effects of neutrons, protons, and other lighter particles that may induce SEP via another mechanism. SEP includes any manifestation of upset induced by a single ion strike, including soft errors (one or more simultaneous reversible bit flips), hard errors (irreversible bit flips), latchup (persistent high conducting state), transients induced in combinatorial devices which may introduce a soft error in nearby circuits, power field effect transistor (FET) burn-out and gate rupture. This test may be considered to be destructive because it often involves the removal of device lids prior to irradiation. Bit flips are usually associated with digital devices and latchup is usually confined to bulk complementary metal oxide semiconductor, (CMOS) devices, but heavy ion induced SEP is also observed in combinatorial logic programmable read only memory, (PROMs), and certain linear devices that may respond to a heavy ion induced charge transient. Power transistors may be tested by the procedure called out in Method 1080 of MIL STD 750.

1.2The procedures described here can be used to simulate and predict SEP arising from the natural space environment, including galactic cosmic rays, planetary trapped ions, and solar flares. The techniques do not, however, simulate heavy ion beam effects proposed for military programs. The end product of the test is a plot of the SEP cross section (the number of upsets per unit fluence) as a function of ion LET (linear energy transfer or ionization deposited along the ion's path through the semiconductor). This data can be combined with the system's heavy ion environment to estimate a system upset rate.

1.3Although protons can cause SEP, they are not included in this guide. A separate guide addressing proton induced SEP is being considered.

1.4The values stated in SI units are to be regarded as standard. No other units of measurement are included in this standard.

1.5This standard does not purport to address all of the safety concerns, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety, health, and environmental practices and determine the applicability of regulatory limitations prior to use.

1.6This international standard was developed in accordance with internationally recognized principles on standardization established in the Decision on Principles for the Development of International Standards, Guides and Recommendations issued by the World Trade Organization Technical Barriers to Trade (TBT) Committee.

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DSCC 14227B:2023 MICROCIRCUIT, DIGITAL-LINEAR, 14 BIT, 125 MSPS ANALOG TO DIGITAL CONVERTER, MONOLITHIC SILICON
DSCC 95757E:2023 MICROCIRCUIT, DIGITAL, HIGH SPEED CMOS, RADIATION HARDENED, SYNCHRONOUS 4-BIT BINARY UP/DOWN COUNTER, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
DSCC 96588F:2023 MICROCIRCUIT, DIGITAL, RADIATION HARDENED, ADVANCED CMOS, OCTAL TRANSPARENT LATCH WITH THREE STATE OUTPUTS, MONOLITHIC SILICON

DSCC 13219B:2023 MICROCIRCUIT, HYBRID, LINEAR, SINGLE CHANNEL, DC-DC CONVERTER

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