ASTM F 1192 : 2024
Current
The latest, up-to-date edition.
Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices
English
01-05-2024
| Committee |
E 10
|
| DocumentType |
Guide
|
| Pages |
12
|
| PublisherName |
American Society for Testing and Materials
|
| Status |
Current
|
| Supersedes |
1.1This guide defines the requirements and procedures for testing integrated circuits and other devices for the effects of single event phenomena (SEP) induced by irradiation with heavy ions having an atomic number Z ≥ 2. This description specifically excludes the effects of neutrons, protons, and other lighter particles that may induce SEP via different mechanisms, for example, ionization or displacement damage. SEP includes any manifestation of upset induced by a single ion strike, including soft errors (one or more simultaneous reversible bit flips), hard errors (irreversible bit flips), latchup (persistent high conducting state), transients induced in combinatorial devices which may introduce a soft error in nearby circuits, power field effect transistor (FET) burn-out, and gate rupture. This test may be considered to be destructive because it often involves the removal of device lids prior to irradiation. Bit flips are usually associated with digital devices and latchup is usually confined to bulk complementary metal oxide semiconductor (CMOS) devices, but heavy ion induced SEP is also observed in combinatorial logic programmable read-only memory (PROMs), and certain linear devices that may respond to a heavy ion induced charge transient. Power transistors may be tested by the procedure called out in Method 1080 of MIL STD 750.
1.2The procedures described here can be used to simulate and predict SEP arising from the natural space environment, including galactic cosmic rays, planetary trapped ions, coronal mass ejections (CMEs), and solar flares. The techniques do not, however, simulate heavy ion beam nuclear interaction effects. The end product of the test is a plot of the SEP cross section (the number of upsets/events per unit fluence) as a function of ion LET (linear energy transfer or ionization deposited along the ion's path through the semiconductor). This data can be combined with an expected system's heavy ion environment to estimate a system upset rate during operation.
1.3Although protons can cause SEP, they are not included in this guide. A separate guide addressing proton induced SEP is being considered.
1.4The values stated in SI units are to be regarded as standard. No other units of measurement are included in this standard.
1.5This standard does not purport to address all of the safety concerns, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety, health, and environmental practices and determine the applicability of regulatory limitations prior to use.
1.6This international standard was developed in accordance with internationally recognized principles on standardization established in the Decision on Principles for the Development of International Standards, Guides and Recommendations issued by the World Trade Organization Technical Barriers to Trade (TBT) Committee.
| DSCC 95638J:2025 | MICROCIRCUIT, DIGITAL, RADIATION HARDENED, 8-BIT MICROCONTROLLER, MONOLITHIC SILICON |
| DSCC 96559F:2025 | MICROCIRCUIT, DIGITAL, ADVANCED CMOS, RADIATION HARDENED, 8-BIT SERIAL/PARALLEL-IN, SERIAL-OUT SHIFT REGISTER, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON |
| DSCC 16209C:2025 | MICROCIRCUIT, LINEAR, BIPOLAR, HIGH PRECISION QUAD OPERATIONAL AMPLIFIER, MONOLITHIC SILICON |
| DSCC 11202D:2025 | MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 2M X 36-bit, 1.8 VOLT, 2-WORD AND 4-WORD BURST, RADIATION HARDENED, SYNCHRONOUS STATIC RANDOM ACCESS MEMORY (SSRAM), MONOLITHIC SILICON |
| DSCC 87695E:2025 | MICROCIRCUIT, DIGITAL, ADVANCED CMOS, OCTAL BUFFER/LINE DRIVER WITH THREE STATE OUTPUTS, MONOLITHIC SILICON |
| DSCC 06223D:2025 | MICROCIRCUIT, HYBRID, LINEAR, 5 VOLT, DUAL CHANNEL, DC-DC CONVERTER MICROCIRCUIT, HYBRID, LINEAR, 5 VOLT, DUAL CHANNEL, DC-DC CONVERTER |
| DSCC 08243C:2025 | MICROCIRCUIT, DIGITAL, CMOS, RADIATION HARDENED, CLOCK NETWORK MANAGER, MONOLITHIC SILICON |
| DSCC 15212C:2025 | MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 2M x 32-BIT (64M), RADIATION-HARDENED, PIPELINED, SYNCHRONOUS SRAM (SSRAM), MONOLITHIC SILICON |
| DSCC 06224D:2025 | MICROCIRCUIT, HYBRID, LINEAR, 15 VOLT, DUAL CHANNEL, DC-DC CONVERTER |
| DSCC 08210C:2025 | MICROCIRCUIT, HYBRID, 12 VOLT, SINGLE CHANNEL, DC/DC CONVERTER |
| DSCC 06221D:2025 | MICROCIRCUIT, HYBRID, 5 VOLT SINGLE CHANNEL, DC-DC CONVERTER |
| DSCC 96577E:2025 | MICROCIRCUIT, DIGITAL, ADVANCED CMOS, RADIATION HARDENED, LOOK-AHEAD CARRY GENERATOR FOR COUNTERS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON |
| DSCC 96581F:2025 | MICROCIRCUIT, DIGITAL, RADIATION HARDENED, ADVANCED CMOS, QUADRUPLE S-R LATCH, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON |
| DSCC V62/24626:2025 | MICROCIRCUIT, BiCMOS, RADIATION-TOLERANT 3V TO 5.5 V RS-485 TRANSCEIVER WITH FLEXIBLE I/O SUPPLY AND IEC ESD PROTECTION , MONOLITHIC SILICON |
| DSCC V62/25635A:2025 | MICROCIRCUIT, LINEAR BiCMOS (LBCSOI2), RADIATION TOLERANT, 2.7 V TO 80 V, 1.1 MHz, RADIATION TOLERANT, 2.7 V TO 80 V, 1.1 MHz, ULTRA-PRECISE, CURRENT-SENSE AMPLIFIER, MONOLITHIC SILICON |
| DSCC 21220A:2025 | MICROCIRCUIT, LINEAR, BiCMOS, DIFFERENTIAL AMPLIFIER, MONOLITHIC SILICON GERMANIUM (SiGe) |
| DSCC 10232E:2025 | MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 2M X 32-BIT (64Mb), RADIATION-HARDENED, SRAM, MULTI-CHIP MODULE |
| DSCC 96877E:2025 | MICROCIRCUIT, MEMORY, DIGITAL, RADIATION-HARDENED, CMOS, 128K x 8 STATIC RAM, MONOLITHIC SILICON |
| DSCC 18209C:2025 | MICROCIRCUIT, DIGITAL-LINEAR, 12 BIT, RF SAMPLING, ANALOG TO DIGITAL CONVERTER, MONOLITHIC SILICON |
| DSCC 87554J:2025 | MICROCIRCUIT, DIGITAL, CMOS, 1-OF-8 DECODER/DEMULTIPLEXER, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON |
| DSCC 87609J:2025 | MICROCIRCUIT, DIGITAL, ADVANCED CMOS, HEX INVERTER, MONOLITHIC SILICON |
| DSCC 89601K:2025 | MICROCIRCUIT, DIGITAL, ADVANCED CMOS, RADIATION HARDENED, OCTAL POSITIVE EDGED-TRIGGERED D-TYPE FLIP-FLOP WITH THREE STATE OUTPUTS AND TTL COMPATIBLE, MONOLITHIC SILICON |
| DSCC 89688G:2025 | MICROCIRCUIT, DIGITAL, ADVANCED CMOS, QUAD 2-INPUT MULTIPLEXER, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON |
| DSCC 12223B:2024 | MICROCIRCUIT, LINEAR, OPERATIONAL AMPLIFIER, DUAL, 36 V, MONOLITHIC SILICON |
| DSCC 92174F:2021 | Microcircuit, Digital, Advanced CMOS, 1-to-8 Minimum Skew Clock Driver, Monolithic Silicon |
| DSCC 19206A:2024 | MICROCIRCUIT, LINEAR, PRECISION, CMOS INPUT, RRIO, WIDE SUPPLY RANGE, AMPLIFIERS, MONOLITHIC SILICON |
| DSCC 88628H:2024 | MICROCIRCUIT, DIGITAL, CMOS, BUS CONTROLLER REMOTE TERMINAL MONOLITHIC SILICON |
| DSCC 89577M:2024 | MICROCIRCUIT, DIGITAL, RADIATION HARDENED, CMOS, BUS CONTROLLER, REMOTE TERMINAL AND MONITOR, MONOLITHIC SILICON |
| DSCC V62/23628:2024 | MICROCIRCUIT, DIGITAL, RADIATION TOLERANT, QUADRUPLE 2-INPUT POSITIVE-NOR GATES, MONOLITHIC SILICON |
| DSCC 22202A:2024 | MICROCIRCUIT, HYBRID, LINEAR, SINGLE CHANNEL, DC-DC CONVERTER |
| DSCC V62/23605A:2024 | MICROCIRCUIT, LINEAR, 0 MHz TO 11 GHz, 3 dB BANDWIDTH, ANALOG TO DIGITAL CONVERTER DRIVER AMPLIFIER, MONOLITHIC SILICON, NEXT GENERATION ENHANCED PRODUCT (NEP) |
| DSCC 25203:2024 | MICROCIRCUIT, MEMORY, DIGITAL, CMOS, RADIATION HARDENED, Gen3, 1 GBit, 32 M x 32, MAGNETORESISTIVE RAM (MRAM), MONOLITHIC SILICON |
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