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BS IEC 62014-5:2015
Current
The latest, up-to-date edition.
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Quality of Electronic and Software Intellectual Property Used in System and System on Chip (SoC) Designs
Hardcopy , PDF
English
30-04-2015
1. Overview
2. Normative references
3. Definitions, acronyms, and abbreviations
4. Interoperability use model
5. QIP schema structures
6. Compatibility with VSIA QIP
Annex A (informative) - Bibliography
Annex B (normative) - Semantic consistency rules
Annex C (informative) - IEEE List of Participants
Specifies a standard XML format for representing electronic design intellectual property (IP) quality information, based on an information model for IP quality measurement.
Committee |
EPL/501
|
DocumentType |
Standard
|
Pages |
46
|
PublisherName |
British Standards Institution
|
Status |
Current
|
This specification defines a standard XML format for representing electronic design intellectual property (IP) quality information, based on an information model for IP quality measurement. It includes a schema and the terms that are relevant for measuring IP quality, including the software that executes on the system. The schema and information model can be focused to represent particular categories of interest to IP users. In the context of this document, the term IP shall be used to mean electronic design intellectual property. Electronic design intellectual property is a term used in the electronic design community to refer to a reusable collection of design specifications that represent the behavior, properties, and/or representation of the design in various media.
Standards | Relationship |
IEC 62014-5:2015 | Identical |
IEEE 1364-2005 | IEEE Standard for Verilog Hardware Description Language |
ISO 8879:1986 | Information processing Text and office systems Standard Generalized Markup Language (SGML) |
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