DSCC 04220G:2025
Current
Current
The latest, up-to-date edition.
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, FIELD PROGRAMMABLE GATE ARRAY, 1,000,000 GATES, MONOLITHIC SILICON
Published date
01-12-2025
Publisher
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This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V).
| DocumentType |
Revision
|
| PublisherName |
Defense Supply Centre Columbus
|
| Status |
Current
|
| Supersedes |
| JEDEC JESD 78:1997 | IC LATCH-UP TEST |
| MIL-STD-883 Revision F:2004 | Microcircuits |
| JEDEC JESD51-7:1999 | High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages |
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