I.S. EN 61523-2:2002
Withdrawn
A Withdrawn Standard is one, which is removed from sale, and its unique number can no longer be used. The Standard can be withdrawn and not replaced, or it can be withdrawn and replaced by a Standard with a different number.
DELAY AND POWER CALCULATION STANDARDS - PART 2: PRE-LAYOUT DELAY CALCULATION SPECIFICATION FOR CMOS ASIC LIBRARIES
Hardcopy , PDF
09-06-2016
English
01-11-2002
For Harmonized Standards, check the EU site to confirm that the Standard is cited in the Official Journal.
Only cited Standards give presumption of conformance to New Approach Directives/Regulations.
Dates of withdrawal of national standards are available from NSAI.
Foreword
1 Scope and object
2 Normative references
3 Relations with other companion standards activities
4 Terms and definitions
5 Pre-layout delay calculation method for CMOS ASIC
libraries
Annex A (informative) Four points interpolation
Annex B (informative) Three points interpolation
Annex C (informative) Selection method of interpolation
plane
Annex D (informative) Theoretical accuracy comparison
between two interpolation methods
Annex E (informative) Application example
Annex F (informative) Example of Cn, Ts, Tpd tables by
delay calculation language
Annex ZA (normative) Normative references to international
publications with their corresponding European
publications
Applicable to CMOS ASIC libraries, which contain cell based primitives and memories to be used during the pre-layout design phase of logic simulation, timing verification and logic synthesis.
DocumentType |
Standard
|
Pages |
50
|
PublisherName |
National Standards Authority of Ireland
|
Status |
Withdrawn
|
Standards | Relationship |
DIN EN 61523-2:2003-06 | Identical |
NF EN 61523-2 : 2003 | Identical |
EN 61523-2:2002 | Identical |
BS EN 61523-2:2002 | Identical |
NBN EN 61523-2 : 2003 | Identical |
IEC 61523-2:2002 | Identical |
IEEE 1481-2009 | IEEE Standard for Integrated Circuit (IC) Open Library Architecture (OLA) |
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