IEC 61523-1:2001
Superseded
Superseded
A superseded Standard is one, which is fully replaced by another Standard, which is a new edition of the same Standard.
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Delay and power calculation standards - Part 1: Integrated circuit delay and power calculation systems
Available format(s)
Hardcopy , PDF
Language(s)
English
Published date
17-09-2001
Publisher
Superseded date
31-12-2021
Superseded by
€488.44
Excluding VAT
The scope of the DPCS standard is to make it possible for integrated circuit designers to analyze chip timing and power consistently across a broad set of EDA applications, for integrated circuit vendors to express timing and power information once (for a given technology), and for EDA vendors to meet their application performance and capacity needs.
| DocumentType |
Standard
|
| Pages |
423
|
| PublisherName |
International Electrotechnical Committee
|
| Status |
Superseded
|
| SupersededBy |
| Standards | Relationship |
| BS EN 61523-1:2002 | Identical |
| UNE-EN 61523-1:2002 | Identical |
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