IEC 61523-4:2015
Superseded
A superseded Standard is one, which is fully replaced by another Standard, which is a new edition of the same Standard.
View Superseded by
Design and Verification of Low-Power Integrated Circuits
Hardcopy , PDF , PDF 3 Users , PDF 5 Users , PDF 9 Users
11-10-2023
English
11-03-2015
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1. Overview
2. Normative references
3. Definitions, acronyms, and abbreviations
4. UPF concepts
5. Language basics
6. Power intent commands
7. Power management cell commands
8. UPF processing
9. Simulation semantics
Annex A (informative) - Bibliography
Annex B (normative) - HDL package UPF
Annex C (normative) - Queries
Annex D (informative) - Replacing deprecated and legacy
commands and options
Annex E (informative) - Low-power design methodology
Annex F (normative) - Value conversion tables
Annex G (normative) - Supporting hard IP
Annex H (normative) - UPF power-management commands semantics
and Liberty mappings
Annex I (informative) - Power-management cell modeling examples
Annex J (informative) - Switching Activity Interchange Format
Annex K (informative) - IEEE List of Participants
IEC 61523-4:2015(E) establishes a format used to define the low-power design intent for electronic systems and electronic intellectual property (IP). The format provides the ability to specify the supply network, switches, isolation, retention, and other aspects relevant to power management of an electronic system. The standard defines the relationship between the low-power design specification and the logic design specification captured via other formats [e.g., standard hardware description languages (HDLs)].
| Committee |
TC 91
|
| DevelopmentNote |
Also numbered as IEEE 1801. (03/2015)
|
| DocumentType |
Standard
|
| Pages |
347
|
| PublisherName |
International Electrotechnical Committee
|
| Status |
Superseded
|
| SupersededBy |
| Standards | Relationship |
| BS IEC 61523-4:2015 | Identical |
| NEN IEC 61523-4 : 2015 | Identical |
| BS EN 60603-7-3:2010 | Identical |
| IEEE 1800-2012 | IEEE Standard for SystemVerilog--Unified Hardware Design, Specification, and Verification Language |
| ISO/IEC 8859-1:1998 | Information technology 8-bit single-byte coded graphic character sets Part 1: Latin alphabet No. 1 |
| IEC 61691-1-1:2011 | Behavioural languages - Part 1-1: VHDL Language Reference Manual |
| IEEE 1364-2005 | IEEE Standard for Verilog Hardware Description Language |
| IEEE 1076-2008 REDLINE | IEEE Standard VHDL Language Reference Manual |
| IEEE 1801-2013 REDLINE | IEEE Standard for Design and Verification of Low-Power Integrated Circuits |
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