IEEE 1450.2 : 2007

FOREWORD
IEEE Introduction
1. Overview
    1.1 Scope
    1.2 Purpose
2. References
3. Definitions, acronyms, and abbreviations
    3.1 Definitions
    3.2 Acronyms and abbreviations
4. Structure of this standard
5. Extensions to Clause 6, STIL syntax description
    5.1 Additional reserved words
    5.2 DC expressions and units (dc_expr)
    5.3 Additions to STIL name spaces and name resolution
         (IEEE Std 1450-1999, 6.16)
6. Statement structure and organization of STIL information
    6.1 Top-level statements and required ordering
    6.2 Optional top-level statements
7. Extensions to Clause 8, STIL statement
    7.1 STIL syntax
    7.2 STIL example
8. Extensions to Clause 19, Spec and Selector blocks
9. Extensions to Clause 16, PatternExec block
    9.1 PatternExec block syntax
    9.2 PatternExec block example
    9.3 DCLevels and DCSets usage in PatternExec and Pattern
         blocks
10. DCLevels block
    10.1 DCLevels block syntax
    10.2 DCLevels block example
    10.3 InheritDCLevels Processing
    10.4 InheritDCLevels example
11. DCSets block
    11.1 DCSets block syntax
    11.2 DCSets statement example
12. DCSequence block
    12.1 DCSequence block syntax
    12.2 DCSequence example
13. Extensions to Clause 18, WaveformTable block
    13.1 Event definition in WaveformTable block
    13.2 Mapping of event integers to DCLevels statements
    13.3 DC levels switching example
14. Extensions to Clause 22, STIL Pattern statements
    14.1 DCLevels statement
    14.2 DCLevels statement example
Annex A (informative) DCLevels and DCSets usage example
Annex B (informative) Bibliography
Annex C (informative) List of participants

Defines structures in STIL: - for specifying the DC conditions for a DUT; - such that the DC conditions may be specified either globally, by pattern burst, by pattern, or by vector; - to allow specification of alternate DC levels; - such that the DC levels and alternate levels can be selected within a period, much the same as timed format events.