IEEE 1481-2009
Superseded
A superseded Standard is one, which is fully replaced by another Standard, which is a new edition of the same Standard.
View Superseded by
IEEE Standard for Integrated Circuit (IC) Open Library Architecture (OLA)
19-03-2020
English
11-03-2010
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1 Overview
2 Normative references
3 Definitions
4 Acronyms and abbreviations
5 Typographical conventions
6 DPCS flow
7 Delay calculation language (DCL)
8 Power modeling and calculation
9 Application and library interaction
10 Procedural interface (PI)
11 Parasitics
Annex A (normative) - Implementation requirements
Sets requirements on delay and power calculation for integrated circuit design with support for modeling logical behavior and signal integrity.
| Committee |
Design Automation
|
| DevelopmentNote |
SUPERSEDES IEEE DRAFT 1481. (01/2000) CD-ROM is also available. (04/2010) Also numbered as IEC 61523-1. (06/2012)
|
| DocumentType |
Standard
|
| Pages |
658
|
| PublisherName |
Institute of Electrical & Electronics Engineers
|
| Status |
Superseded
|
| SupersededBy | |
| Supersedes |
| BS IEC 62265:2005 | Advanced library format (ALF) describing integrated circuit (IC) technology, cells and blocks |
| BS EN 61523-2:2002 | Delay and power calculation standards Pre-layout delay calculation specification for CMOS ASIC libraries |
| I.S. EN 61523-2:2002 | DELAY AND POWER CALCULATION STANDARDS - PART 2: PRE-LAYOUT DELAY CALCULATION SPECIFICATION FOR CMOS ASIC LIBRARIES |
| IEC 62265:2005 | Advanced Library Format (ALF) describing Integrated Circuit (IC) technology, cells and blocks |
| SAE J2546_200202 | Model Specification Process Standard |
| IEC 61523-2:2002 | Delay and power calculation standards - Part 2: Pre-layout delay calculation specification for CMOS ASIC libraries |
| EN 61523-2:2002 | Delay and power calculation standards - Part 2: Pre-layout delay calculation specification for CMOS ASIC libraries |
| ISO/IEC 9899:2011 | Information technology Programming languages C |
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