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IEEE 896.2-1991

Withdrawn

Withdrawn

A Withdrawn Standard is one, which is removed from sale, and its unique number can no longer be used. The Standard can be withdrawn and not replaced, or it can be withdrawn and replaced by a Standard with a different number.

IEEE Standard Backplane Bus Specification for Multiprocessor Architectures: Futurebus+(R)

Available format(s)

PDF

Withdrawn date

09-12-1997

Language(s)

English

Published date

24-04-1992

€191.88
Excluding VAT

1. Introduction
1.1 Scope
1.2 References
1.2.1 Protocol Stack Specifications
1.2.2 International Government Regulations for Safety
        and EMI/RFI Control
2. Definitions and Structure
2.1 Special Word Usage
2.2 Definitions
2.3 Signal Conventions
2.4 Numbering Conventions
2.5 Futurebus+ Logo
3. Node Management
3.1 Introduction
3.1.1 Address Space
3.1.2 Base Functional Character
3.1.3 Optional Functional Character
3.2 Futurebus+ CSR Specification
3.2.1 CSR Memory Space Specification
3.2.2 Core CSRs
3.2.3 Futurebus+ Dependent CSR Area
3.2.4 Bus Specific ROM Entries
3.2.5 Core CSR Root Directory
3.2.6 Initial Units Space
3.2.7 Unit-Specific Interrupts
3.2.8 Distributed Arbitration Messages and General
        Arbitrated Messages
4. Live Insertion
4.1 Description
4.1.1 Introduction
4.1.2 General Considerations
4.1.3 Levels of Live Insertion
4.1.4 Operator Facilities
4.1.5 Live Insertion State Diagram
4.1.6 Conceptual Module Design
4.2 Specification
4.2.1 Definitions
4.2.2 System Operation Requirements
4.2.3 Live Insertion Power Requirements
4.2.4 Module Activation and Deactivation
4.2.5 Live Insertion ESD Requirements
4.2.6 Live Insertion Electrical Requirements
4.2.7 Futurebus+ Live Insertion Glyph
4.2.8 Definition of SWAP Indicator
5. Introduction to Application Environment Profiles
5.1 Application Environment Profile (AEP) Description
5.2 Minimum Requirements for AEPs (AEP Specification)
5.2.1 AEP Terminology and Definitions
5.2.2 AEP Organization
5.2.3 Profile Content
5.2.4 Physical Layer
5.2.5 Environmental
5.2.6 Standards Requirements
6. Application Environment Profile A
6.1 Reference Specification
6.1.1 Introduction
6.1.2 Target Market and Applications
6.1.3 Terminology
6.1.4 Referenced Documents
6.1.5 Reference Tables
6.1.6 Profiles Interoperability
6.2 Detailed Specification
6.2.1 Arbitration
6.2.2 Parallel Protocol
6.2.3 Bus/Node Management and CSRs
6.2.4 Cache Coherence
6.2.5 Message Passing
6.2.6 System Configuration
6.2.7 Profile A Power
6.2.8 Profile A Electrical
6.2.9 Live Insertion and Withdrawal
6.2.10 Mechanical
6.2.11 Input/Output
6.2.12 Profile A Connector, Power, and Signal Pin
        Assignment
6.2.13 Environmental Specifications and Other Standards
        Compliance
7. Application Environment Profile B
7.1 Reference Specification
7.1.1 Introduction
7.1.2 Target Market and Applications
7.1.3 Profile B Terminology
7.1.4 Referenced Documents
7.1.5 Reference Tables
7.1.6 Multiple Profile Interoperability
7.2 Detailed Specification
7.2.1 Arbitration
7.2.2 Parallel Protocol
7.2.3 Bus/Node Management and CSRs
7.2.4 Caching and Cache Coherence
7.2.5 Message Passing
7.2.6 System Configuration
7.2.7 Profile B Power
7.2.8 Profile B Electrical
7.2.9 Live Insertion and Withdrawal
7.2.10 Mechanical
7.2.11 Input/Output
7.2.12 Profile B Connector, Power, and Signal Pin
        Assignment
7.2.13 Environmental Specifications and Other Standards
        Compliance
8. Application Environment Profile F
8.1 Reference Specifications
8.1.1 Introduction
8.1.2 Target Market and Applications
8.1.3 Profile F Terminology
8.1.4 IEEE Standards Referenced
8.1.5 Reference Tables
8.1.6 Multiple Profile Interoperability
8.2 Detailed Specification
8.2.1 Arbitration
8.2.2 Parallel Protocol
8.2.3 Timing Specifications
8.2.4 Bus/System Management and CSRs
8.2.5 Caching and Cache Coherence
8.2.6 Message Passing
8.2.7 System Configuration
8.2.8 Power Supply
8.2.9 Electrical
8.2.10 Live Insertion and Withdrawal
8.2.11 Mechanical
8.2.12 Input/Output
8.2.13 Connector, Power, and Signal Pin Assignment
8.2.14 Environmental
8.3 Specification for a Module-Based Central Arbiter
8.3.1 Backplane Requirements
8.3.2 Backplane Delay Arbitration Message
8.3.3 System Reset
8.3.4 AC Voltage Low
8.3.5 Electrical
NUMEROUS FIGURES
NUMEROUS TABLES

Describes and specifies the physical layer of the bus. Coverage includes special word usage. signal conventions, memory addresses, byte lane mapping, distributed arbitration, node state control, packet control, unit access, parallel protocol, timing specification, message passing, power supply specifications, live insertion, reference tables, transaction tables, and system configuration. Also gives definitions, tables and diagrams.

Committee
Microprocessor Standards Committee
DocumentType
Standard
Pages
222
PublisherName
Institute of Electrical & Electronics Engineers
Status
Withdrawn

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