IEEE DRAFT 1386.1 : D2.2 APR 2000

1 Overview
1.1 Scope
1.2 Purpose
1.3 General arrangement
1.4 Dimensions
2 References
3 Definitions, abbreviations & terminology
4 Mechanics and compliance
4.1 Conformance
4.2 PMC voltage keying
4.3 Connector configurations
4.4 Power consumption, heat dissipation and air flow
4.5 Electromagnetic compatibility
4.6 Shock and vibration
4.7 Environmental
4.8 MTBF
5 Electrical and logical layer
5.1 Connector utilization
5.2 PMC connector pinout
5.3 Comparison of pin usage, PCI to PMC
5.4 Mapping of PCI reserve pins
List of figures
Figure 1-1 Typical PMC mounted to a host module
Figure 5-1 Connector orientation of PMC, Side 1
Figure 5-2 Connector orientation on host, Side 1
List of tables
Table 5-1 Connector pinout
Table 5-2 Pin use comparison PCI to PMC (single size)
Table 5-3 PCI-reserved/PMC relationship

Defines a family of low profile modular mezzanine cards for VMEbus, Futurebus+, desktop computers, and other computer systems with the logical and electrical layers based on the PCI (Peripheral Component Interface) Specification from the PCI Special Interest Group. The mechanical and environmental layers are specified within the Common Mezzanine Card (CMC) Standard P1386 Draft 1.0.