ISO/IEC 10861:1994
Current
The latest, up-to-date edition.
Information technology Microprocessor systems High-performance synchronous 32-bit bus: MULTIBUS II
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English
15-12-1994
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Defines the operation, functions, and attributes of the IEEE 1296 bus standard. Defines a high-performance 32-bit synchronous bus standard. Intended for general purpose applications to optimize block transfers, including protocol for message passing. Intended to support multiple processor modules in a functionally partitioned configuration and heterogeneous processor types in the same system and heterogeneous processor types in the same system.
| DevelopmentNote |
Supersedes IEEE 1296. (06/2015)
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| DocumentType |
Standard
|
| Pages |
130
|
| PublisherName |
International Organization for Standardization
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| Status |
Current
|
| Standards | Relationship |
| BS ISO/IEC 10861:1994 | Identical |
| CAN/CSA-ISO/IEC 13961:2002(R2016) | INFORMATION TECHNOLOGY - SCALABLE COHERENT INTERFACE (SCI) |
| CSA ISO/IEC 13961 : 2002 : R2011 | INFORMATION TECHNOLOGY - SCALABLE COHERENT INTERFACE (SCI) |
| ISO/IEC 13961:2000 | Information technology — Scalable Coherent Interface (SCI) |
| BS ISO/IEC 13213:1994 | Information technology. Microprocessor systems. Control and Status Registers (CSR) Architecture for microcomputer buses |
| CSA ISO/IEC 13961:2002 | INFORMATION TECHNOLOGY - SCALABLE COHERENT INTERFACE (SCI) |
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