JEDEC JEP150A:2023
Current
Current
The latest, up-to-date edition.
Stress-Test-Driven Qualification of and Failure Mechanisms Associated with Assembled Solid State Surface-Mount Devices
Available format(s)
Hardcopy , PDF
Language(s)
English
Published date
01-12-2023
Publisher
Free
Excluding VAT
The electronics industry has qualification standards for loose devices (e.g., JESD47, JESD94), printed wiring boards (PWBs) (e.g., IPC standards), and 2nd level interconnect reliability (i.e., solder joints) (e.g., IPC standards) that are performed as separate activities.
| DocumentType |
Standard
|
| Pages |
30
|
| PublisherName |
JEDEC Solid State Technology Association
|
| Status |
Current
|
| Supersedes |
| JEDEC JESD61A.01:2007 | ISOTHERMAL ELECTROMIGRATION TEST PROCEDURE |
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