JEDEC JEP155B:2018(R2024)
Current
Current
The latest, up-to-date edition.
Recommended ESD Target Level for HBM Qualification
Available format(s)
Hardcopy , PDF
Language(s)
English
Published date
01-07-2018
Publisher
Free
Excluding VAT
The intent of this report is to document and provide critical information to assess and make decisions on safe ESD level requirements.
| DocumentType |
Standard
|
| Pages |
58
|
| PublisherName |
JEDEC Solid State Technology Association
|
| Status |
Current
|
| Supersedes |
| DSCC V62/06612B:2019 | MICROCIRCUIT, LINEAR, VOLTAGE PREREGULATOR, HIGH POWER FACTOR, MONOLITHIC SILICON |
| DSCC V62/23605A:2024 | MICROCIRCUIT, LINEAR, 0 MHz TO 11 GHz, 3 dB BANDWIDTH, ANALOG TO DIGITAL CONVERTER DRIVER AMPLIFIER, MONOLITHIC SILICON, NEXT GENERATION ENHANCED PRODUCT (NEP) |
| DSCC V62/24617:2024 | MICROCIRCUIT, DIGITAL, RADIATION-TOLERANT HEX OPEN-DRAIN BUFFERS WITH INTEGRATED TRANSLATION, MONOLITHIC SILICON |
| DSCC V62/23628:2024 | MICROCIRCUIT, DIGITAL, RADIATION TOLERANT, QUADRUPLE 2-INPUT POSITIVE-NOR GATES, MONOLITHIC SILICON |
| DSCC V62/24620:2024 | MICROCIRCUIT, DIGITAL, HEX INVERTER BUFFERS/DRIVERS WITH OPEN-DRAIN OUTPUTS, MONOLITHIC SILICON |
| JEDEC JESD47L:2022 | Stress-Test-Driven Qualification of Integrated Circuits |
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