JEDEC JESD 7-A : 1986
Current
Current
The latest, up-to-date edition.
STANDARD FOR DESCRIPTION OF 54/74HCXXXX AND 54/74HCTXXXX HIGH SPEED CMOS DEVICES
Available format(s)
Hardcopy , PDF
Language(s)
English
Published date
01-08-1986
Publisher
Free
Excluding VAT
| DocumentType |
Standard
|
| Pages |
97
|
| PublisherName |
JEDEC Solid State Technology Association
|
| Status |
Current
|
| DSCC 85507H:2022 | MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, OCTAL D-TYPE FLIP-FLOP WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON |
| DSCC 88757E:2025 | MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, PHASE-LOCKED-LOOP WITH VOLTAGE CONTROLLED OSCILLATOR, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON |
| DSCC 87680E:2020 | MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, 14-STAGE BINARY COUNTER, MONOLITHIC SILICON |
| DSCC 88757 D : 2020 | MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, PHASE-LOCKED-LOOP WITH VOLTAGE CONTROLLED OSCILLATOR, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON |
| DSCC 89852D:2025 | MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, 8-BIT ADDRESSABLE LATCH, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON |
| DSCC86812F:2024 | MICROCIRCUIT, DIGITAL, HIGH SPEED CMOS, HEX BUFFER/DRIVER WITH INVERTING THREESTATE OUTPUTS, MONOLITHIC SILICON |
| DSCC 85154E:2020 | MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, DUAL J-K FLIP-FLOP WITH RESET, MONOLITHIC SILICON |
| DSCC 87806F:2023 | MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, BCD-TO-7 SEGMENT LATCH/DECODER/DRIVER, MONOLITHIC SILICON |
| DSCC 89843:2019 | MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, TRIPLE 3 -INPUT NAND GATE, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON |
| DSCC 86826F:2024 | MICROCIRCUIT, DIGITAL, HIGH SPEED CMOS, 4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER, MONOLITHIC SILICON |
| DSCC 91513C:2023 | MICROCIRCUIT, DIGITAL, HIGH SPEED CMOS, AND-OR-INVERT GATES, MONOLITHIC SILICON |
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