JEDEC JESD 8-7A : 2006
Current
The latest, up-to-date edition.
1.8 V ± 0.15 V (Normal Range) and 1.2 V - 1.95 V (Wide Range) Power Supply Voltage and Interface Standardfor Nonterminated Digital IntegratedCircuits
Hardcopy , PDF
English
01-06-2006
This standard defines power supply voltages, dc interface and switching parameters for a high speed, low
voltage family of non-terminated digital circuits driving/driven by parts of the same family, or mixed
families which comply with the input/output interface specifications.
DocumentType |
Standard
|
Pages |
14
|
PublisherName |
JEDEC Solid State Technology Association
|
Status |
Current
|
Supersedes |
JEDEC JESD82-17.01:2023 | Definition of the SSTUA32S868 and SSTUA32D868 Registered Buffer with Parity for 2R x 4 DDR2 RDIMM Applications |
JEDEC JESD82-27.01:2023 | Definition of the SSTUB32869 Registered Applications Buffer with Parity for DDR2 RDIMM |
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