JEDEC JESD47J.01:2017
Superseded
A superseded Standard is one, which is fully replaced by another Standard, which is a new edition of the same Standard.
View Superseded by
Stress-Test-Driven Qualification of Integrated Circuits
Hardcopy , PDF
English
01-09-2017
15-12-2022
This standard describes a baseline set of acceptance tests for use in qualifying electronic components as new products, a product family, or as products in a process which is being changed.
| DocumentType |
Revision
|
| Pages |
30
|
| PublisherName |
JEDEC Solid State Technology Association
|
| Status |
Superseded
|
| SupersededBy | |
| Supersedes |
| JEDEC JESD 22-A111B:2018 | EVALUATION PROCEDURE FOR DETERMINING CAPABILITY TO BOTTOM SIDE BOARD ATTACH BY FULL BODY SOLDER IMMERSION OF SMALL SURFACE MOUNT SOLID STATE DEVICES |
| CEI EN IEC 63287-2:2023 | Semiconductor devices - Guidelines for reliability qualification plans Part 2: Concept of mission profile |
Access your standards online with a subscription
-
Simple online access to standards, technical information and regulations.
-
Critical updates of standards and customisable alerts and notifications.
-
Multi-user online standards collection: secure, flexible and cost effective.