MIL-M-38510-245 Revision B:2006
Current
The latest, up-to-date edition.
Microcircuits, Digital, CMOS, 4096 Bit, Static Random Access Memory (SRAM), Bulk Silicon and Silicon on Sapphire
13-03-2006
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1. SCOPE
2. APPLICABLE DOCUMENTS
3. REQUIREMENTS
4. VERIFICATION
5. PACKAGING
6. NOTES
APPENDIX A - FUNCTIONAL ALGORITHMS
Describes the detail requirements for bulk silicon and silicon on sapphire (SOS), static, 4096 bit, random access memory microcircuits.
| DevelopmentNote |
Inactive for the new design. (03/2006) B NOTICE 1 - Notice of Validation but remains Inactive for New Design. (01/2011) NEW CHILD NOT 2 2020 IS ADDED
|
| DocumentType |
Standard
|
| Pages |
80
|
| ProductNote |
NEW CHILD NOT 2 2020 IS ADDED
|
| PublisherName |
US Military Specs/Standards/Handbooks
|
| Status |
Current
|
This specification covers the detail requirements for bulk silicon and silicon on sapphire (SOS), static, 4096 bit, random access memory microcircuits. Two product assurance classes, four radiation hardness assurance levels, and a choice of case outlines and lead finishes are provided and are reflected in the part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, (see 6.4).
| MIL-STD-883 Revision K:2016 | TEST METHOD STANDARD - MICROCIRCUITS |
| MIL-PRF-38535 Revision K:2013 | Integrated Circuits (Microcircuits) Manufacturing, General Specification for |
| MIL-STD-1835 Revision D:2004 | ELECTRONIC COMPONENT CASE OUTLINES |
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