MIL-M-38510-507 Revision B:2006
Current
The latest, up-to-date edition.
Microcircuits, Memory, Digital, CMOS Ultraviolet Erasable Programmable Array Logic, Monolithic Silicon
27-02-2006
1. SCOPE
2. APPLICABLE DOCUMENTS
3. REQUIREMENTS
4. VERIFICATION
5. PACKAGING
6. NOTES
Gives the detail requirements for monolithic silicon, CMOS, erasable programmable array logic microcircuits which employ an EPROM cell as the programming element.
| DevelopmentNote |
Inactive for New Design. (03/2006) B NOTICE 1 - Notice of Validation but remains Inactive for New Design. (01/2011) NEW CHILD NOT 2 2020 IS NOW ADDED
|
| DocumentType |
Standard
|
| Pages |
24
|
| ProductNote |
NEW CHILD NOT 2 2020 IS NOW ADDED
|
| PublisherName |
US Military Specs/Standards/Handbooks
|
| Status |
Current
|
This specification covers the detail requirements for monolithic silicon, CMOS, erasable programmable array logic microcircuits which employ an EPROM cell as the programming element. Two product assurance classes (B and S) and a choice of case outlines and lead finishes are provided and are reflected in the complete part or identifying number (PIN). For this product, the requirements of MIL-M-38510 have been
superseded by MIL-PRF-38535, (see 6.4).
| MIL-STD-883 Revision K:2016 | Microcircuits |
| MIL-PRF-38535 Revision K:2013 | Integrated Circuits (Microcircuits) Manufacturing, General Specification for |
| MIL-STD-1835 Revision D:2004 | Electronic Component Case Outlines |
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