MIL-PRF-19500-270 Revision K:2016
Current
The latest, up-to-date edition.
Transistor, Unitized, Dual, NPN, Silicon Through Hole Mount Package, Type 2N2060 Quality Levels JAN, JANTX, JANTXV, and JANS
English
27-01-2016
1. SCOPE
2. APPLICABLE DOCUMENTS
3. REQUIREMENTS
4. VERIFICATION
5. PACKAGING
6. NOTES
Specifies the performance requirements for two electrically isolated, matched NPN, silicon transistors as one dual unit.
| DevelopmentNote |
Supersedes MIL S 19500/270 (E). (02/2000)
|
| DocumentType |
Standard
|
| Pages |
16
|
| PublisherName |
US Military Specs/Standards/Handbooks
|
| Status |
Current
|
| Supersedes |
This specification covers the performance requirements for two electrically isolated, matched NPN, silicon transistors as one dual unit. Four levels of product assurance (JAN, JANTX, JANTXV, and JANS) are provided for each device type as specified in MIL-PRF-19500.
| MIL-PRF-19500 Revision P:2010 | Semiconductor Devices, General Specification for |
| MIL-STD-750 Revision F:2011 | Test Methods for Semiconductor Devices |
Access your standards online with a subscription
-
Simple online access to standards, technical information and regulations.
-
Critical updates of standards and customisable alerts and notifications.
-
Multi-user online standards collection: secure, flexible and cost effective.