NBN EN 61964 : 2000
Current
The latest, up-to-date edition.
INTEGRATED CIRCUITS - MEMORY DEVICES PIN CONFIGURATIONS
12-01-2013
INTRODUCTION
1. Scope
2. Normative reference
3. Terms and definitions
4. Pin Configurations Catalogue
4.1 Integrated Circuit Dynamic Read/Write
Memories
4.2 Integrated Circuit Synchronous Dynamic
Read/Write Memories
4.3 Integrated Circuit Static Read/Write Memories
4.4 Integrated Circuit Read-only Memories
4.5 Integrated Circuit Programmable Read-Only
Memories
4.6 MOS Ultraviolet Light Erasable and Programmable
Read-Only Memories
4.7 Integrated Circuit Electrically Erasable and
Programmable Read-Only Memories
4.8 Memory Modules Comprising Integrated Circuit
Memories
Annex A (informative) Bibliography
Table 1 - Nibble wide organization DRAM
Table 2 - Byte wide organization DRAM
Table 3 - Word wide organization DRAM (1)
Table 4 - Word wide organization DRAM (2)
Table 5 - Nibble wide organization SDRAM
Table 6 - Byte wide organization SDRAM
Table 7 - Word wide organization SDRAM
Annex ZA (normative) Normative references to international
publications with their corresponding European publications
Covers pinout package configurations of solid state integrated circuit memory devices. This standard is intended to establish a registration procedure for such configurations.
DocumentType |
Standard
|
PublisherName |
Belgian Standards
|
Status |
Current
|
Standards | Relationship |
DIN EN 61964:2000-01 | Identical |
EN 61964:1999 | Identical |
I.S. EN 61964:2000 | Identical |
BS EN 61964:1999 | Identical |
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