SAE J 2628 : 2013(S2018)
Current
The latest, up-to-date edition.
Characterization, Conducted Immunity
Hardcopy , PDF
English
12-06-2018
The methods included in this document are: a. Voltage-Temperature Design Margins. b. Voltage Interruptions and Transients. c. Voltage Dropouts and Dips. d. Current Draw Under a Number of Conditions. e. Switch Input Noise These methods are best applied during the Development stage but can be used at all stages (e.g., Pre-Qualification, Qualification or Conformity).
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