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TA NWT 001210 : ISSUE 1

Current

Current

The latest, up-to-date edition.

GENERIC REQUIREMENTS FOR HIGH-BIT-RATE DIGITAL SUBSCRIBER LINES

Published date

12-01-2013

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1 Introduction
1.1 Purpose
1.2 HDSL as a Repeaterless T1 within a CSA
1.2.1 Timely Service Provisioning
1.2.2 Cost-Saving Opportunities
1.3 Document Organization
1.4 Requirements Definition and Conventions
2 HDSL Overview and Related Technical References
2.1 Description of the HDSL Technology
2.2 HDSL Technology as a T1 Line Alternative
2.2.1 Customer Service Access Configurations
2.2.2 Digital Loop Carrier
3 Loop Plant Environment
3.1 CSA Loop Make-Up Criteria
3.2 CSA Loop Plant Characteristics
4 Spectrum Compatibility
4.1 Crosstalk
5 HDSL System Requirements
5.1 Dual Duplex HDSL Architecture Requirements
5.1.1 Normal Two-Loop Operation
5.1.2 DS1 Signal Description
5.1.3 General HTU Description
5.1.4 HDSL Transport of DS1 Signals
5.1.5 DS1 Signal Multiplexing in the HDSL
5.1.6 Optional Single Loop 784 kb/s Operation
5.1.7 HDSL Start-Up Procedure
5.2 External HDSL Interfaces
5.2.1 Network Side DSX-1 Interface
5.2.2 Customer Side DS1 Interface
5.2.3 Timing Reference Interface
5.2.4 Power and Direct Current Interfaces
5.2.5 Sealing Current
5.2.6 HDSL Line Interface
5.3 HTU Environmental Requirements
6 Transmission Characteristics
6.1 Transmission Method
6.2 Line Code
6.2.1 Characteristics of Pulses
6.2.2 Power Spectrum of the Transmitted Signal
6.3 Baud Rate
6.4 Jitter
6.4.1 HTU-R Input Signal Jitter Tolerance
6.4.2 HTU-R Output Jitter Limitation
6.4.3 HTU-C Input Signal Jitter Tolerance
6.4.4 HTU-C Output Jitter Limitation
6.5 Transmitter Linearity
6.6 Line Interface
6.6.1 Impedance and Return Loss
6.6.2 Longitudinal Output Voltage
6.6.3 HTU-R Longitudinal Balance
6.6.4 HTU-C Longitudinal Balance
6.7 HDSL Signal Frame Structure
6.7.1 Pictorial Quaternary View of the HDSL
              Frame Structure
6.7.2 HDSL Frame Bit Assignments
6.7.3 HDSL Overhead Function Requirements
6.7.4 Stuffing Quat/Bit Values
6.7.5 Summary of Proposed HDSL Overhead Function
              Bandwidths 6-13
6.8 Scrambling Method
7 Laboratory Measurement of Bit Error Ratio
7.1 Test Set-Up
7.2 Simulated Crosstalk
7.2.1 Calibration of Crosstalk Simulation Filter
7.2.2 Measurement of Simulated NEXT Power and PSD
7.3 Longitudinal Noise
7.4 Power-Related Metallic Noise
7.5 Test Procedure
7.6 Margin
7.7 Notes on NEXT Filter
7.8 Test Loops for BER Measurement
7.8.1 Loss Characterization of the Test Loops
8 HDSL Operations: Administration, Maintenance &
              Provisioning (OAM&P)
8.1 General HDSL Systems Maintenance
8.1.1 DS1 Service Maintenance and the DS1 Interface
              Connector 8-3
8.1.2 HDSL Application of DSL-type Maintenance Tools
8.1.3 Possible New HDSL Operations Tools
8.2 HDSL Operations Features and Functions
8.3 Out-of-Service Testing
8.3.1 Candidate Out-of-Service Testing Functions
8.3.2 HDSL Self-Tests: System and HTU Levels
8.4 In-Service Performance Monitoring
8.5 HDSL Maintenance Functions in Overhead Bandwidth
8.5.1 Embedded Operations Channel (eoc)
8.5.2 Candidate Overhead Bit Indicators and Bit-Invoked
              Functions
8.5.3 Cyclic Redundancy Check (crc) Code Bits
8.5.4 Far End Block Error (febe) Bit
8.5.5 Alarm Indicator Bit (aib)
8.5.6 DS1 Error Bit (ds1e)
8.5.7 Power Status (ps) Bits
8.5.8 HDSL Repeater Unit Present (hrp) Indicator Bit
8.6 Internal HDSL HTU-to-HTU Communications
8.7 HTU Maintenance Personnel Interface and
              Faceplate Features
8.7.1 On-site HTU Control Interface
8.8 Metallic Testing
8.8.1 Metallic Test Access
8.8.2 HTU-R Quiet Mode
8.8.3 Insertion Loss Measurement Test (ILMT)
8.8.4 HTU-R DC Termination
8.9 HDSL System Start-Up
8.10 HDSL Common Equipment Mounting Arrangements
8.10.1 Powering and Fusing
8.10.2 Office Alarm Contact Closures
8.10.3 Common Maintenance Interface
8.10.4 Operation System (OS) Interface
8.10.5 Maintainability Features for a Common Controller
8.10.6 Metallic Test Access to HDSL Loops
8.10.7 Metallic Access to the DS1 Facilities
9 Topics for Further Study
9.1 HDSL Outside Plant Line Repeater
9.2 Integration of HDSL into Network Elements
10 Miscellaneous Common Requirements
10.1 Physical Requirements
10.1.1 Shock and Vibration
10.1.2 HTU-C Frame
10.1.3 HTU-R Cabinet Housings
10.1.4 Human Factors
10.1.5 Fire Resistance
10.2 Environmental Requirements
10.2.1 Temperature and Humidity
10.2.2 Altitude
10.2.3 HTU-C Heat Dissipation
10.2.4 Acoustical Noise
10.2.5 Airborne Contaminants
10.2.6 Environmental Impact and Conservation
10.2.7 Lightning and AC Power Faults
10.2.8 Electromagnetic Emission and Immunity
              Requirements and Objectives
10.2.9 Electrostatic Discharge
10.2.10 Steady-State Power Induction
10.3 Electrical Safety
10.3.1 Battery Safety
10.4 Quality and Reliability
10.4.1 Hardware Reliability Predictions
10.4.2 Device Reliability
10.4.3 Physical Design
10.4.4 Software Quality
10.4.5 Manufacturing Process
10.4.6 Product Support
10.4.7 Verification of Quality and Reliability
10.5 System Administration
10.5.1 Documentation and Supplier Information
10.5.2 Transmission Performance Information
REFERENCES
APPENDIX A: GLOSSARY OF ACRONYMS
APPENDIX B: CHARACTERISTICS OF THE LOOP PLANT WITHIN A
              CSA
LIST OF FIGURES
Figure 2-1 Dual Duplex High-bit-rate Digital Subscriber
              Line (HDSL) System
Figure 2-2 Simplified Echo-Canceler-with-Hybrid (ECH)
              Transceiver Structure
Figure 2-3 Repeaterless DS1 Access: Stand-alone HTUs
Figure 2-4 ISDN Primary Rate Access; Stand-alone HTUs
Figure 2-5 Repeaterless DS1 Access: Extension From Fiber
Figure 2-6 UDLC Transport: Stand-alone HTUs
Figure 2-7 IDLC Transport: Integrated HTUs
Figure 2-8 DLC Transport
Figure 4-1 Models of 1% NEXT for 18 kft of 22-AWG PIC Cable,
              Terminated with the Characteristic Impedance at
              each Frequency (NEXT Disturbers in the same
              Cable Binder Unit of 50 Pairs)
Figure 5-1 Signal Paths in an HDSL Terminal Unit (HTU)
Figure 5-2 Example Loop-side DC Characteristics of the HTU-R
Figure 5-3 Possible Dual Duplex HDSL Loop-Side Metallic
              Connections: Preliminary View
Figure 5-4 Possible Provisioned-Single-Loop HDSL Loop-Side
              Metallic Connections: Preliminary View
Figure 6-1 Example of 2B1Q Quaternary Symbols
Figure 6-2 Normalized Pulse from HTU-R or HTU-C Transmitter
Figure 6-3 Upper Bound of Power Spectral Density of Signal
              from HTU-R or HTU-C Transmitter
Figure 6-4 Range of Permissible Sinusoidal Jitter, Signal
              Originating from HTU-C
Figure 6-5 Measurement of HDSL Transmitter Linearity
Figure 6-6 Minimum Return Loss
Figure 6-7 HTU-R and HTU-C Longitudinal Balance
Figure 6-8 Pictorial Quaternary View of HDSL Frame Structure
Figure 6-9 Scrambler and Descrambler
Figure 7-1 HDSL Transceiver NEXT Performance Test Set-Up
Figure 7-2 PSD for Simulated Near End Crosstalk (NEXT)
Figure 7-3 Waveform for Longitudinal Noise
Figure 7-4 Power Spectral Density (PSD) of Assumed Interferers
Figure 7-5 HDSL CSA-Type Test Loops No. 0 to No. 4
Figure 7-6 HDSL CSA-Type Test Loops No. 5 to No. 8
Figure 7-7 HDSL Extended CSA-type Test Loops No. 9 to No. 10
Figure 7-8 Loop ABCD Parameters, Impedances, and Load Voltage
Figure 8-1 HDSL crc-based In-Service Performance Monitoring

Presents Bellcore's preliminary view of an initial set of generic requirements for High-bit-rate Digital Subscriber Line (HDSL) transmission technology. The HDSL technology provides an alternative to repeatered T1 lines for a Local Exchange Carrier (LEC).

DocumentType
Standard
PublisherName
Telcordia Technologies
Status
Current

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