Intellectual Property Rights
Foreword
1 Scope
1.1 Common scrambling algorithm
1.2 Language
2 Normative references
3 Definitions and abbreviations
3.1 Definitions
3.2 Abbreviations
4 Architecture
4.1 System architecture
4.2 Description of components
5 Description of interfaces
5.1 ECMG <> SCS
5.2 EMMG <> MUX
5.3 PDG <> MUX
5.4 Custom SI Generator <> PSI Generator
5.5 Custom SI Generator <> SI Generator
5.6 EIS <> SI Generator
5.7 SI Generator <> MUX
5.8 EIS <> MUX Config
5.9 MUX Config <> PSI
5.10 PSI Generator <> MUX
5.11 MUX <> SCR
5.12 SCR onward
5.13 SCS <> MUX
5.14 SCS <> SCR
5.15 SCS <> CWG
5.16 EIS <> SCS
6 Generic message description
6.1 Generic message structure
6.2 Message_type values
7 Interface specific message description
7.1 ECMG <> SCS
7.2 EMMG <> MUX and PDG <>MUX
8 Timing and play-out issues
8.1 Timing issues
8.2 Delay start
8.3 Delay stop
8.4 Play-out issues
9 System layering
9.1 Introduction
9.2 Physical Layer
9.3 Data Link Layer
9.4 Network Layer
9.5 Transport Layer
9.6 Session Layer
9.7 System layering overview/Communications
protocol stack
9.8 TCP connection establishment
Annex A (informative): SCS coexistence
A.1 Introduction
A.2 Example scenario
Annex B (informative): Control Word (CW) generation
and testing
B.1 Introduction
B.2 Background
B.3 Generation
B.4 Control Word (CW) randomness verification
testing
B.5 Testing locations
History