BS EN 16602-60-02:2014

Foreword
Introduction
1 Scope
2 Normative references
3 Terms, definitions and abbreviated terms
4 ASIC and FPGA programme management
5 ASIC and FPGA engineering
6 Quality assurance system
7 Development documentation
8 Deliverables
Annex A (normative) - ASIC and FPGA control
        plan (ACP) - DRD
Annex B (normative) - ASIC and FPGA development
        plan (ADP) - DRD
Annex C (normative) - ASIC and FPGA requirements
        specification (ARS) - DRD
Annex D (normative) - Feasibility and risk
        assessment report (FRA) - DRD
Annex E (normative) - Verification plan (VP) - DRD
Annex F (normative) - Design validation plan (DVP) - DRD
Annex G (normative) - Data sheet - DRD
Annex H (normative) - Detail specification (DS) - DRD
Annex I (normative) - Experience summary report - DRD
Annex J (informative) - Document requirements list and
        configuration items to be delivered
Bibliography

Describes a comprehensive set of requirements for the user development of digital, analog and mixed analog-digital custom designed integrated circuits, such as application specific integrated circuits (ASICs) and field programmable gate arrays (FPGAs).

This Standard defines a comprehensive set of requirements for the user development of digital, analog and mixed analog-digital custom designed integrated circuits, such as application specific integrated circuits (ASICs) and field programmable gate arrays (FPGAs). The user development includes all activities beginning with setting initial requirements and ending with the validation and release of prototype devices. This Standard is aimed at ensuring that the custom designed components used in space projects meet their requirements in terms of functionality, quality, reliability, schedule and cost. The support of appropriate planning and risk management is essential to ensure that each stage of the development activity is consolidated before starting the subsequent one and to minimize or avoid additional iterations. For the development of standard devices, such as application specific standard products (ASSPs) and IP cores, and devices which implement safety related applications, additional requirements can be included which are not in the scope of this document. The principal clauses of this Standard correspond to the main concurrent activities of a circuit development programme. These include: - ASIC and FPGA programme management, - ASIC and FPGA engineering, - ASIC and FPGA quality assurance. The provisions of this document apply to all actors involved in all levels in the realization of space segment hardware and its interfaces. This standard may be tailored for the specific characteristics and constraints of a space project, in accordance with ECSS-S-ST-00.