GR 378 CORE : ISSUE 4

Preface
1 Introduction
  1.1 Purpose of the Document
  1.2 Reason for Reissue
  1.3 Organization of the Document
  1.4 Requirements Terminology
  1.5 Requirement Labelling Conventions
2 Background
  2.1 Synchronization
  2.2 Synchronization Hierarchy
  2.3 BITS
  2.4 TSG Relationship with PRS
3 TSG Architecture
  3.1 Hardware Protection
  3.2 Multiple TSGs
4 Input Criteria
  4.1 Timing Mode
  4.2 Input Signals
  4.3 Physical Interface
  4.4 Reference Switching
  4.5 Input Tolerance
5 Timing Generation
  5.1 Stratum Level
  5.2 Synchronization Pull-In/Hold-In Range
  5.3 Switching Between Timing Modes
  5.4 Transition from Holdover to Normal Mode
6 Output Criteria
  6.1 Output Signals
  6.2 Output Performance
7 Slave Clock Criteria
  7.1 Slave Clock Requirements
  7.2 CC Robustness Requirements
8 Synchronization Status Messaging
  8.1 Message Validation
  8.2 Reference Selection
  8.3 Reaction Time
  8.4 Output Messages
  8.5 Synchronization Alarms and Reports
9 Operations
  9.1 Operations Architecture
  9.2 Synchronization Performance Monitoring
  9.3 Maintenance Functions
  9.4 Control of TSG Features
10 Quality Assurance and Reliability
   10.1 Reliability Definitions
   10.2 Reliability Requirements
11 Other Generic Criteria
   11.1 Operational Environment
   11.2 Physical Design
   11.3 Human Factors
   11.4 Documentation and Training
   11.5 Power Systems Interface
Requirement-Object List
References
Bibliography
Acronyms
Requirement-Object Index

Provides generic criteria for Timing Signal Generators (TSGs), which are clocks that are used throughout service provider networks, most frequently as the Building Integrated Timing Supply (BITS) for a central office.