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I.S. EN 61691-3-3:2002

Current

Current

The latest, up-to-date edition.

BEHAVIOURAL LANGUAGES - PART 3-3: SYNTHESIS IN VHDL

Available format(s)

Hardcopy , PDF

Published date

15-02-2002

For Harmonized Standards, check the EU site to confirm that the Standard is cited in the Official Journal.

Only cited Standards give presumption of conformance to New Approach Directives/Regulations.


Dates of withdrawal of national standards are available from NSAI.

Foreword
INTRODUCTION
1 Overview
2 References
3 Definitions
4 Interpretation of the standard logic types
5 The STD_MATCH function
6 Signal edge detection
7 Standard arithmetic packages
Annex A (informative) Notes on the package functions

Supports the synthesis and verification of hardware designs, by defining vector types for representing signed or unsigned integer values and providing standard interpretations of widely used scalar VHDL values.

Committee
TC 93
DevelopmentNote
For CENELEC adoptions of IEC publications, please check www.iec.ch to be sure that you have any corrigenda that may apply. (01/2017)
DocumentType
Standard
ISBN
2-8318-5839-9
Pages
58
PublisherName
National Standards Authority of Ireland
Status
Current

Standards Relationship
EN 61691-3-3:2001 Identical
IEC 61691-3-3:2001 Identical
DIN EN 61691-3-3:2002-11 Identical
NF EN 61691-3-3 : 2002 Identical

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