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IEC 60749-26:2018

Current

Current

The latest, up-to-date edition.

Semiconductor devices - Mechanical and climatic test methods - Part 26: Electrostatic discharge (ESD) sensitivity testing - Human body model (HBM)

Available format(s)

Hardcopy , PDF , PDF 3 Users , PDF 5 Users , PDF 9 Users

Language(s)

English - French

Published date

15-01-2018

€311.90
Excluding VAT

FOREWORD
1 Scope
2 Normative references
3 Terms and definitions
4 Apparatus and required equipment
5 Stress test equipment qualification and
  routine verification
6 Classification procedure
7 Failure criteria
8 Component classification
Annex A (informative) - HBM test method flow
        chart
Annex B (informative) - HBM test equipment
        parasitic properties
Annex C (informative) - Example of testing a
        product using Table 2, Table 3, or Table
        with a two-pin HBM tester
Annex D (informative) - Examples of coupled
        non-supply pin pairs
Annex E (normative) - Cloned non-supply (I/O)
        pin sampling test method
Bibliography

IEC 60749-26:2018 establishes the procedure for testing, evaluating, and classifying components and microcircuits according to their susceptibility (sensitivity) to damage or degradation by exposure to a defined human body model (HBM) electrostatic discharge (ESD).
The purpose of this document is to establish a test method that will replicate HBM failures and provide reliable, repeatable HBM ESD test results from tester to tester, regardless of component type. Repeatable data will allow accurate classifications and comparisons of HBM ESD sensitivity levels.
ESD testing of semiconductor devices is selected from this test method, the machine model (MM) test method (see IEC 60749-27) or other ESD test methods in the IEC 60749 series. Unless otherwise specified, this test method is the one selected.
This fourth edition cancels and replaces the third edition published in 2013. This edition constitutes a technical revision. This standard is based upon ANSI/ESDA/JEDEC JS-001-2014. It is used with permission of the copyright holders, ESD Association and JEDEC Solid state Technology Association.
This edition includes the following significant technical changes with respect to the previous edition:
a) a new subclause relating to HBM stressing with a low parasitic simulator is added, together with a test to determine if an HBM simulator is a low parasitic simulator;
b) a new subclause is added for cloned non-supply pins and a new annex is added for testing cloned non-supply pins.

Committee
TC 47
DevelopmentNote
Supersedes IEC PAS 62179. (10/2003) Stability Date: 2020. (01/2018)
DocumentType
Standard
Pages
106
PublisherName
International Electrotechnical Committee
Status
Current
Supersedes

DSCC V62/17611A:2023 MICROCIRCUIT, LINEAR-DIGITAL, ROBUST 5 kV RMS ISOLATED RS-485 TRANSCEIVER WITH LEVEL 4 DO-160G EMC AND FULL ±42 V PROTECTION, MONOLITHIC SILICON

IEC 60749-27:2006+AMD1:2012 CSV Semiconductor devices - Mechanical and climatic test methods - Part27: Electrostatic discharge (ESD) sensitivity testing - Machine model (MM)

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