IEC 61523-3:2004
Current
The latest, up-to-date edition.
Delay and power calculation standards - Part 3: Standard Delay Format (SDF) for the electronic design process
Hardcopy , PDF , PDF 3 Users , PDF 5 Users , PDF 9 Users
English
24-09-2004
Important note : Users cannot be edited or removed once added to your Multi user PDF.The Standard Delay Format (SDF)is an existing OVI standard for the representation and interpretation of timing data for use at any stage of the electronic design process.The ASCII data in the SDF le is represented in a tool and language independent way and includes path delays,timing constraint values,inter-connect delays and high level technology parameters. This standard is published with a double logo IEC-IEEE. standard.
| DevelopmentNote |
Also numbered as IEEE 1497. (09/2004) Stability Date: 2015. (10/2012)
|
| DocumentType |
Standard
|
| Pages |
90
|
| PublisherName |
International Electrotechnical Committee
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| Status |
Current
|
| Standards | Relationship |
| BS IEC 61523-3:2004 | Identical |
| BS IEC 62265:2005 | Advanced library format (ALF) describing integrated circuit (IC) technology, cells and blocks |
| IEC 62265:2005 | Advanced Library Format (ALF) describing Integrated Circuit (IC) technology, cells and blocks |
| IEEE 1364-2005 | IEEE Standard for Verilog Hardware Description Language |
| IEEE 1076-2008 REDLINE | IEEE Standard VHDL Language Reference Manual |
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