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IEEE DRAFT 1076.6 : D1.12A 99
Superseded
Superseded
A superseded Standard is one, which is fully replaced by another Standard, which is a new edition of the same Standard.
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DRAFT STANDARD FOR VHDL REGISTER TRANSFER LEVEL SYNTHESIS
Superseded date
09-03-2000
Published date
12-01-2013
1 Overview
2 References
3 Definitions
4 Predefined types
5 Verification methodology
6 Modeling hardware elements
7 Pragmas
8 Syntax
Annex A Syntax summary (informative)
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