JEDEC JESD 22-B113B:2018
Current
Current
The latest, up-to-date edition.
Board Level Cyclic Bend Test Method for Interconnect Reliability Characterization of SMT ICs for Handheld Electronic Products
Available format(s)
Hardcopy , PDF
Language(s)
English
Published date
01-08-2018
Publisher
Important note : Users cannot be edited or removed once added to your Multi user PDF.The Board Level Cyclic Bend Test Method is intended to evaluate and compare the performance of SMT ICs in an accelerated test environment for handheld electronic products applications.
| Committee |
JC-14.1
|
| DocumentType |
Test Method
|
| Pages |
26
|
| PublisherName |
JEDEC Solid State Technology Association
|
| Status |
Current
|
| Supersedes |
| IPC JEDEC-9704A:2012 | Printed Circuit Assembly Strain Gage Test Guideline |
| IPC J STD 033C-1:2014 | HANDLING, PACKING, SHIPPING AND USE OF MOISTURE, REFLOW, AND PROCESS SENSITIVE DEVICES |
| IPC-9701B:2022 | Thermal Cycling Test Method for Fatigue Life Characterization of Surface Mount Attachments |
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