MIL-HDBK-528 Base Document:2017
NA
Status of Standard is Unknown
Design For Testability (DFT)for Boundary Scan Diagnostics (BSD)
English
31-10-2017
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FOREWORD
1. SCOPE
2. APPLICABLE DOCUMENTS
3. ACRONYMS AND DEFINITIONS
4. GENERAL GUIDANCE
5. DETAILED GUIDANCE
6. NOTES
Gives guidance for the Department of Defense (DoD) to acquire avionics systems that use Boundary Scan.
| DocumentType |
Standard
|
| Pages |
13
|
| PublisherName |
US Military Specs/Standards/Handbooks
|
| Status |
NA
|
This handbook provides guidance for the Department of Defense (DoD) to acquire avionics systems that use Boundary Scan. This document describes the design considerations necessary for a host system to implement Boundary Scan Diagnostics (BSD). Boundary Scan is a technique used to test the interconnections between integrated circuits (ICs) on a circuit card assembly (CCAs), as well as to test the health of the ICs themselves and to load data into them. Boundary Scan can also be used in a system-level configuration between several boards. Boundary Scan is low cost and requires less physical access to circuit components than traditional testing techniques, such as In-Circuit Testing (ICT) for detecting and isolating component failures. With today\'s highly complex and dense circuit cards, Boundary Scan is a useful technique for troubleshooting and ensuring production quality.
| IEEE 1687-2014 | IEEE Standard for Access and Control of Instrumentation Embedded within a Semiconductor Device |
| MIL-HDBK-2165 Base Document:1995 | Testability Program for Systems and Equipments |
| IEEE 1149.1-2013 REDLINE | IEEE Standard for Test Access Port and Boundary-Scan Architecture |
| IEC 61690-2:2000 | Electronic design interchange format (EDIF) - Part 2: Version 4 0 0. (This publication is available in electronic HTML format only) |
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