BS EN 62258-5:2006
Current
The latest, up-to-date edition.
Semiconductor die products Requirements for information concerning electrical simulation
Hardcopy , PDF
English
30-11-2006
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INTRODUCTION
1 Scope
2 Normative references
3 Terms and definitions
4 General
5 Requirements for information on electrical simulation
models
5.1 Information on the electrical simulation model
5.2 Information on device connectivity
5.3 Information on the timing simulation model
5.4 Information on connection redistribution
5.5 Information on package terminals
Annex A (informative) Supporting information
Annex ZA (normative) Normative references to international
publications with their corresponding European
publications
Bibliography
Describes the information required to facilitate the use of electrical data and models for simulation of the electrical behaviour and verification of the correct functionality of electronic systems that include bare semiconductor die, with or without connection structures, and/or minimally packaged semiconductor die.
| Committee |
EPL/47
|
| DevelopmentNote |
Supersedes BS PD ES 59008-4.4 & 05/30139920 DC. (11/2006)
|
| DocumentType |
Standard
|
| Pages |
16
|
| PublisherName |
British Standards Institution
|
| Status |
Current
|
| Supersedes |
IEC 62258-5:2006 has been developed to facilitate the production, supply and use of semiconductor die products, including:
- wafers;
- singulated bare die;
- die and wafers with attached connection structures;
- minimally or partially encapsulated die and wafers.
This part of IEC 62258 specifies the information required to facilitate the use of electrical data and models for simulation of the electrical behaviour and verification of the correct functionality of electronic systems that include bare semiconductor die, with or without connection structures, and/or minimally packaged semiconductor die. It is intended to assist all those involved in the supply chain for die devices to comply with the requirements of IEC 62258-1 and IEC 62258-2.
This publication is to be read in conjunction with IEC 62258-1:2009 and IEC 62258-2:2011.
| Standards | Relationship |
| IEC 62258-5:2006 | Identical |
| EN 62258-5 : 2006 | Identical |
| I.S. EN 62258-5:2006 | Identical |
| NF EN 62258-5 : 2006 | Identical |
| DIN EN 62258-5:2007-02 | Identical |
| NBN EN 62258-5 : 2007 | Identical |
| IEC 61691-1-1:2011 | Behavioural languages - Part 1-1: VHDL Language Reference Manual |
| EN 62258-2:2011 | SEMICONDUCTOR DIE PRODUCTS - PART 2: EXCHANGE DATA FORMATS |
| IEC 62258-1:2009 | Semiconductor die products - Part 1: Procurement and use |
| IEC 62014-1:2001 | Electronic design automation libraries - Part 1: Input/output buffer information specifications (IBIS version 3.2) |
| IEEE 1364-2005 | IEEE Standard for Verilog Hardware Description Language |
| EN 62258-1:2010 | Semiconductor die products - Part 1: Procurement and use |
| IEEE 1076-2008 REDLINE | IEEE Standard VHDL Language Reference Manual |
| IEC 62258-2:2011 | Semiconductor die products - Part 2: Exchange data formats |
| IEC 61691-2:2001 | Behavioural languages - Part 2: VHDL multilogic system for model interoperability |
| IEEE 1149.1-2013 REDLINE | IEEE Standard for Test Access Port and Boundary-Scan Architecture |
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