IEC 62258-5:2006

FOREWORD
INTRODUCTION
1 Scope
2 Normative references
3 Terms and definitions
4 General
5 Requirements for information on electrical simulation
  models
  5.1 Information on the electrical simulation model
  5.2 Information on device connectivity
  5.3 Information on the timing simulation model
  5.4 Information on connection redistribution
  5.5 Information on package terminals
Annex A (informative) Supporting information
Bibliography

IEC 62258-5:2006 has been developed to facilitate the production, supply and use of semiconductor die products, including:
- wafers;
- singulated bare die;
- die and wafers with attached connection structures;
- minimally or partially encapsulated die and wafers.
This part of IEC 62258 specifies the information required to facilitate the use of electrical data and models for simulation of the electrical behaviour and verification of the correct functionality of electronic systems that include bare semiconductor die, with or without connection structures, and/or minimally packaged semiconductor die. It is intended to assist all those involved in the supply chain for die devices to comply with the requirements of IEC 62258-1 and IEC 62258-2.

This publication is to be read in conjunction with IEC 62258-1:2009 and IEC 62258-2:2011.