• I.S. EN 60191-6-22:2013

    Current The latest, up-to-date edition.

    MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES - PART 6-22: GENERAL RULES FOR THE PREPARATION OF OUTLINE DRAWINGS OF SURFACE MOUNTED SEMICONDUCTOR DEVICE PACKAGES - DESIGN GUIDE FOR SEMICONDUCTOR PACKAGES SILICON FINE-PITCH BALL GRID ARRAY AND SILICON FINE-PITCH LAND GRID ARRAY (S-FBGA AND S-FLGA) (IEC 60191-6-22:2012 (EQV))

    Available format(s):  Hardcopy, PDF

    Language(s):  English

    Published date:  01-01-2013

    Publisher:  National Standards Authority of Ireland

    For Harmonized Standards, check the EU site to confirm that the Standard is cited in the Official Journal.
    Only cited Standards give presumption of conformance to New Approach Directives/Regulations.

    Dates of withdrawal of national standards are available from NSAI.

    Add To Cart

    Table of Contents - (Show below) - (Hide below)

    FOREWORD
    1 Scope
    2 Normative references
    3 Terms and definitions
    4 Terminal position numbering
    5 Code of package nominal dimensions
    6 Symbols and drawings
    7 Dimensions
    8 Combination list of D, E, M[D], and M[E]
    Bibliography

    Abstract - (Show below) - (Hide below)

    Gives the outline drawings and dimensions common to silicon-based package structures and materials of ball grid array packages (BGA) and land grid array packages (LGA).

    General Product Information - (Show below) - (Hide below)

    Development Note For CENELEC adoptions of IEC publications, please check www.iec.ch to be sure that you have any corrigenda that may apply. (01/2017)
    Document Type Standard
    Publisher National Standards Authority of Ireland
    Status Current

    Standards Referencing This Book - (Show below) - (Hide below)

    IEC 60191-6:2009 Mechanical standardization of semiconductor devices - Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages
    IEC 60191-6-12:2011 Mechanical standardization of semiconductor devices - Part 6-12: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guidelines for fine-pitch land grid array (FLGA)
    IEC 60191-6-5:2001 Mechanical standardization of semiconductor devices - Part 6-5: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine-pitch ball grid array (FBGA)
    • Access your standards online with a subscription

      Features

      • Simple online access to standards, technical information and regulations
      • Critical updates of standards and customisable alerts and notifications
      • Multi - user online standards collection: secure, flexibile and cost effective