IPC 9261 : A
Superseded
A superseded Standard is one, which is fully replaced by another Standard, which is a new edition of the same Standard.
IN-PROCESS DPMO AND ESTIMATED YIELD FOR PCAS
01-10-2006
12-09-2023
1 OVERVIEW
1.1 Scope
1.2 Purpose
1.3 Terms and Definitions
1.3.1 DPMO (Defects per Million Opportunities)
1.3.2 DPU (Defects per Unit)
1.3.3 Process Step Estimated Yield
1.3.4 Component Opportunities (o[c])
1.3.5 Component Defect (d[c])
1.3.6 Placement Opportunity (o[p])
1.3.7 Placement Defect (d[p])
1.3.8 Termination Opportunity (o[t])
1.3.9 Termination Defect (d[t])
1.3.10 Assembly Opportunity (o[a])
1.3.11 Assembly Defect (d[a])
2 APPLICABLE DOCUMENTS
3 CALCULATION OF IN-PROCESS METRICS
3.1 Calculation of In-Process Metrics - Assumptions
3.2 Calculation Examples
3.3 Calculation of Placement DPMO
3.4 Calculation of Termination DPMO
3.5 Calculation of Component DPMO
3.6 Calculation of Assembly DPMO
4 ESTIMATED YIELD
Appendix A: Defect Classification
Defines standard methodologies for calculating defects per million opportunities (DPMO) metrics related to electronic printed board assembly processes.
| Committee |
5-20
|
| DocumentType |
Standard
|
| PublisherName |
IPC by Global Electronics Association
|
| Status |
Superseded
|
| BS EN 61189-5-1:2016 | Test methods for electrical materials, printed boards and other interconnection structures and assemblies General test methods for materials and assemblies. Guidance for printed board assemblies |
| EN 61189-5-1:2016 | Test methods for electrical materials, printed boards and other interconnection structures and assemblies - Part 5-1: General test methods for materials and assemblies - Guidance for printed board assemblies |
| IPC 1720 : A2004 | ASSEMBLY QUALIFICATION PROFILE |
| IEC 61189-5-1:2016 | Test methods for electrical materials, printed boards and other interconnection structures and assemblies - Part 5-1: General test methods for materials and assemblies - Guidance for printed board assemblies |