IPC 9261 : A
Superseded
A superseded Standard is one, which is fully replaced by another Standard, which is a new edition of the same Standard.
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IN-PROCESS DPMO AND ESTIMATED YIELD FOR PCAS
English
01-10-2006
12-09-2023
1 OVERVIEW
1.1 Scope
1.2 Purpose
1.3 Terms and Definitions
1.3.1 DPMO (Defects per Million Opportunities)
1.3.2 DPU (Defects per Unit)
1.3.3 Process Step Estimated Yield
1.3.4 Component Opportunities (o[c])
1.3.5 Component Defect (d[c])
1.3.6 Placement Opportunity (o[p])
1.3.7 Placement Defect (d[p])
1.3.8 Termination Opportunity (o[t])
1.3.9 Termination Defect (d[t])
1.3.10 Assembly Opportunity (o[a])
1.3.11 Assembly Defect (d[a])
2 APPLICABLE DOCUMENTS
3 CALCULATION OF IN-PROCESS METRICS
3.1 Calculation of In-Process Metrics - Assumptions
3.2 Calculation Examples
3.3 Calculation of Placement DPMO
3.4 Calculation of Termination DPMO
3.5 Calculation of Component DPMO
3.6 Calculation of Assembly DPMO
4 ESTIMATED YIELD
Appendix A: Defect Classification
Defines standard methodologies for calculating defects per million opportunities (DPMO) metrics related to electronic printed board assembly processes.
| Committee |
5-20
|
| DocumentType |
Standard
|
| Pages |
12
|
| PublisherName |
IPC by Global Electronics Association
|
| Status |
Superseded
|
| SupersededBy | |
| Supersedes |
| BS EN 61189-5-1:2016 | Test methods for electrical materials, printed boards and other interconnection structures and assemblies General test methods for materials and assemblies. Guidance for printed board assemblies |
| EN 61189-5-1:2016 | Test methods for electrical materials, printed boards and other interconnection structures and assemblies - Part 5-1: General test methods for materials and assemblies - Guidance for printed board assemblies |
| IPC J STD 001 SWEDISH : E | REQUIREMENTS FOR SOLDERED ELECTRICAL AND ELECTRONIC ASSEMBLIES |
| IPC J STD 001 RUSSIAN : E | REQUIREMENTS FOR SOLDERED ELECTRICAL AND ELECTRONIC ASSEMBLIES |
| IPC J STD 001 TURKISH : E2010 | REQUIREMENTS FOR SOLDERED ELECTRICAL AND ELECTRONIC ASSEMBLIES |
| IPC J STD 001 POLISH : E | REQUIREMENTS FOR SOLDERED ELECTRICAL AND ELECTRONIC ASSEMBLIES |
| IPC 9191 : 0 | GENERAL GUIDELINES FOR IMPLEMENTATION OF STATISTICAL PROCESS CONTROL (SPC) |
| IPC 7912 : A | END-ITEM DPMO FOR PRINTED CIRCUIT BOARD ASSEMBLIES |
| IPC DPMO 202 : 2002 | IPC 7912/9261 END ITEM AND IN-PROCESS DPMO SET |
| IPC J STD 001 HUNGARIAN : E | REQUIREMENTS FOR SOLDERED ELECTRICAL AND ELECTRONIC ASSEMBLIES |
| IPC J STD 001 GERMAN : F | REQUIREMENTS FOR SOLDERED ELECTRICAL AND ELECTRONIC ASSEMBLIES |
| IPC J STD 001 ROMANIAN : F | REQUIREMENTS FOR SOLDERED ELECTRICAL AND ELECTRONIC ASSEMBLIES |
| IPC J STD 001 DANISH : E | REQUIREMENTS FOR SOLDERED ELECTRICAL AND ELECTRONIC ASSEMBLIES |
| IPC 9199 : 0 | STATISTICAL PROCESS CONTROL (SPC) QUALITY RATING |
| IPC J STD 001 CHINESE : F | REQUIREMENTS FOR SOLDERED ELECTRICAL AND ELECTRONIC ASSEMBLIES |
| IPC J STD 001 SPANISH : F | REQUIREMENTS FOR SOLDERED ELECTRICAL AND ELECTRONIC ASSEMBLIES |
| IPC J STD 001 FRENCH : F | REQUIREMENTS FOR SOLDERED ELECTRICAL AND ELECTRONIC ASSEMBLIES |
| IPC 1720 : A2004 | ASSEMBLY QUALIFICATION PROFILE |
| IEC 61189-5-1:2016 | Test methods for electrical materials, printed boards and other interconnection structures and assemblies - Part 5-1: General test methods for materials and assemblies - Guidance for printed board assemblies |
| IPC J STD 001 : F | REQUIREMENTS FOR SOLDERED ELECTRICAL AND ELECTRONIC ASSEMBLIES |
| IPC DPMO 202 : 2002 | IPC 7912/9261 END ITEM AND IN-PROCESS DPMO SET |
| IPC A 610 : F | ACCEPTABILITY OF ELECTRONIC ASSEMBLIES |
| IPC E 500 : LATEST | IPC ELECTRONIC DOCUMENT COLLECTION |
| IPC 9191 : 0 | GENERAL GUIDELINES FOR IMPLEMENTATION OF STATISTICAL PROCESS CONTROL (SPC) |
| IPC 7912 : A | END-ITEM DPMO FOR PRINTED CIRCUIT BOARD ASSEMBLIES |