Name: JEDEC JESD 22-B113B:2018
Brand: JEDEC

Board Level Cyclic Bend Test Method for Interconnect Reliability Characterization of SMT ICs for Handheld Electronic Products

Available format(s)

Hardcopy , PDF

Language(s)

English

Published date

01-08-2018

Publisher

JEDEC Solid State Technology Association

The Board Level Cyclic Bend Test Method is intended to evaluate and compare the performance of SMT ICs in an accelerated test environment for handheld electronic products applications.

Committee	JC-14.1
DocumentType	Test Method
Pages	26
PublisherName	JEDEC Solid State Technology Association
Status	Current
Supersedes	JEDEC JESD 22-B113A:2012

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JEDEC JESD 22-B113B:2018

Board Level Cyclic Bend Test Method for Interconnect Reliability Characterization of SMT ICs for Handheld Electronic Products

Abstract

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Standards Referencing This Book

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