Name: JEDEC JESD22-B113C:2025
Brand: JEDEC
Availability: InStock

Board Level Cyclic Bend Test Method for Interconnect Reliability Characterization of SMT ICs for Handheld Electronic Products

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Hardcopy , PDF

Language(s)

English

Published date

01-11-2025

Publisher

JEDEC Solid State Technology Association

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The Board Level Cyclic Bend Test Method is intended to evaluate and compare the performance of SMT ICs in an accelerated test environment for handheld electronic products applications.

DocumentType	Test Method
Pages	24
PublisherName	JEDEC Solid State Technology Association
Status	Current
Supersedes	JEDECJESD22-B113B : 2018 JEDEC JESD 22-B113B:2018

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JEDEC JESD22-B113C:2025

Board Level Cyclic Bend Test Method for Interconnect Reliability Characterization of SMT ICs for Handheld Electronic Products

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