NBN EN 61760-1 : 2007

INTRODUCTION
1 Scope
2 Normative references
3 Definitions
4 General requirements
    4.1 Contents of specifications
    4.2 Declaration of soldering process suitability
    4.3 Packaging and packaging marking
    4.4 Component marking
    4.5 Storage
    4.6 Component outline
    4.7 Mechanical stress
    4.8 Ordering information
5 Identification of assembly process conditions
    5.1 General
    5.2 Placement
    5.3 Securing the component on the substrate prior to
          soldering
    5.4 Soldering methods
    5.5 Cleaning (if applicable)
    5.6 Removal and/or replacement of SMDs
    5.7 Special handling conditions
6 Reference conditions
    6.1 Soldering processes, temperature/time profiles
    6.2 Classification
    6.3 Reference set of assembly cleaning conditions
7 Tests
    7.1 General
    7.2 Soldering
    7.3 Resistance to mechanical forces
    7.4 Resistance to cleaning solvent
Tables
1 SMD classification related to tests and soldering
    processes
2 Basic cleaning procedures
3 Immersion conditions related to processes to be
    simulated
4 Immersion conditions for solderability (wetting and
    dewetting) and dissolution of metallization
Figures
1 Manufacturing steps
2 Vapour phase soldering, batch system with preheating -
    Temperature/time profile (terminal temperature)
3 Vapour phase soldering, in-line system with preheating -
    Temperature/time profile (terminal temperature)
4 Infrared soldering, forced gas convection soldering -
    temperature/time profile (terminal temperature)
5 Double wave soldering - Temperature/time profile (terminal
    temperature)
A.1 Examples of immersion for solderability testing
A.2 Components with gull-wing leads
A.3 Components with J-leads
A.4 Cubic or cylindrical components
A.5 Components with rectangular leads
A.6 Components with butt leads
Annex A (normative) Test methods for soldering
Annex ZA Normative references to international publications
with their corresponding European publications

Provides a reference set of process conditions and related test conditions to be used when compiling component specifications of electronic components that are intended for usage in surface mount technology.