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  • CEI EN 60191-6-17 : 2012

    Current The latest, up-to-date edition.

    MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES - PART 6-17: GENERAL RULES FOR THE PREPARATION OF OUTLINE DRAWINGS OF SURFACE MOUNTED SEMICONDUCTOR DEVICE PACKAGES - DESIGN GUIDE FOR STACKED PACKAGES - FINE-PITCH BALL GRID ARRAY AND FINE-PITCH LAND GRID ARRAY (P-PFBGA AND P-PFLGA)

    Available format(s):  Hardcopy, PDF

    Language(s):  English

    Published date:  01-01-2012

    Publisher:  Comitato Elettrotecnico Italiano

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    Table of Contents - (Show below) - (Hide below)

    FOREWORD
    INTRODUCTION
    1 Scope
    2 Normative references
    3 Definitions
    4 Terminal position numbering
    5 Drawings
    6 Dimensions
    7 Dimension table
    Annex ZA (normative) - Normative references to
             international publications with their
             corresponding European publications

    Abstract - (Show below) - (Hide below)

    Gives outline drawings and dimensions for stacked packages and individual stackable packages in the form of FBGA or FLGA.

    General Product Information - (Show below) - (Hide below)

    Committee CT 309
    Development Note Classificazione CEI 47-82. (02/2012)
    Document Type Standard
    Publisher Comitato Elettrotecnico Italiano
    Status Current

    Standards Referencing This Book - (Show below) - (Hide below)

    IEC 60191-6:2009 Mechanical standardization of semiconductor devices - Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages
    IEC 60191-6-5:2001 Mechanical standardization of semiconductor devices - Part 6-5: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine-pitch ball grid array (FBGA)
    EN 60191-6:2009 Mechanical standardization of semiconductor devices - Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages
    EN 60191-6-5:2001 Mechanical standardization of semiconductor devices - Part 6-5: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine-pitch ball grid array (FBGA)
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