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I.S. EN 60191-6-20:2010

Current

Current

The latest, up-to-date edition.

MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES - PART 6-20: GENERAL RULES FOR THE PREPARATION OF OUTLINE DRAWINGS OF SURFACE MOUNTED SEMICONDUCTOR DEVICE PACKAGES - MEASURING METHODS FOR PACKAGE DIMENSIONS OF SMALL OUTLINE J-LEAD PACKAGES (SOJ)

Available format(s)

Hardcopy , PDF

Language(s)

English

Published date

01-01-2010

For Harmonized Standards, check the EU site to confirm that the Standard is cited in the Official Journal.

Only cited Standards give presumption of conformance to New Approach Directives/Regulations.


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€28.00
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FOREWORD
1 Scope
2 Normative references
3 Terms and definitions
4 Measuring methods
Annex ZA (normative) - Normative references to international
         publications with their corresponding European
         publications

Defines methods to measure package dimensions of small outline J-lead-packages (SOJ), package outline form E in accordance with IEC 60191-4.

DevelopmentNote
For CENELEC adoptions of IEC publications, please check www.iec.ch to be sure that you have any corrigenda that may apply. (01/2017)
DocumentType
Standard
Pages
17
PublisherName
National Standards Authority of Ireland
Status
Current

IEC 60191-6:2009 Mechanical standardization of semiconductor devices - Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages
IEC 60191-4:2013 Mechanical standardization of semiconductor devices - Part 4: Coding system and classification into forms of package outlines for semiconductor device packages
EN 60191-6:2009 Mechanical standardization of semiconductor devices - Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages

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