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    I.S. EN 60191-6-21:2010

    Current The latest, up-to-date edition.

    MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES - PART 6-21: GENERAL RULES FOR THE PREPARATION OF OUTLINE DRAWINGS OF SURFACE MOUNTED SEMICONDUCTOR DEVICE PACKAGES - MEASURING METHODS FOR PACKAGE DIMENSIONS OF SMALL OUTLINE PACKAGES (SOP)

    Available format(s):  Hardcopy, PDF

    Language(s):  English

    Published date:  01-01-2010

    Publisher:  National Standards Authority of Ireland

    For Harmonized Standards, check the EU site to confirm that the Standard is cited in the Official Journal.
    Only cited Standards give presumption of conformance to New Approach Directives/Regulations.

    Dates of withdrawal of national standards are available from NSAI.

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    Table of Contents - (Show below) - (Hide below)

    FOREWORD
    1 Scope
    2 Normative references
    3 Terms and definitions
    4 Measuring methods
    Annex ZA (normative) - Normative references to international
             publications with their corresponding European
             publications

    Abstract - (Show below) - (Hide below)

    Defines methods to measure package dimensions of small outline packages (SOP), package outline form E in accordance to IEC 60191-4.

    General Product Information - (Show below) - (Hide below)

    Development Note For CENELEC adoptions of IEC publications, please check www.iec.ch to be sure that you have any corrigenda that may apply. (01/2017)
    Document Type Standard
    Publisher National Standards Authority of Ireland
    Status Current

    Standards Referencing This Book - (Show below) - (Hide below)

    IEC 60191-6:2009 Mechanical standardization of semiconductor devices - Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages
    IEC 60191-4:2013 Mechanical standardization of semiconductor devices - Part 4: Coding system and classification into forms of package outlines for semiconductor device packages
    EN 60191-6:2009 Mechanical standardization of semiconductor devices - Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages
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